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| author | Yann Herklotz <ymherklotz@gmail.com> | 2019-01-19 23:12:25 +0000 |
|---|---|---|
| committer | Yann Herklotz <ymherklotz@gmail.com> | 2019-01-19 23:12:25 +0000 |
| commit | 64a0ae3600073f486462b1d056409954634b0084 (patch) | |
| tree | a2315f2f075a2c91b88b0cb3bfaa581d702e2e48 /src/VeriFuzz/Verilog/Mutate.hs | |
| parent | 771ff2ccb2f07f5c60d4af260d236ee148de667f (diff) | |
| download | verismith-64a0ae3600073f486462b1d056409954634b0084.tar.gz verismith-64a0ae3600073f486462b1d056409954634b0084.zip | |
Reformat with stylish-haskell
Diffstat (limited to 'src/VeriFuzz/Verilog/Mutate.hs')
| -rw-r--r-- | src/VeriFuzz/Verilog/Mutate.hs | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/VeriFuzz/Verilog/Mutate.hs b/src/VeriFuzz/Verilog/Mutate.hs index 3052598..82d3db9 100644 --- a/src/VeriFuzz/Verilog/Mutate.hs +++ b/src/VeriFuzz/Verilog/Mutate.hs @@ -14,9 +14,7 @@ more random patterns, such as nesting wires instead of creating new ones. module VeriFuzz.Verilog.Mutate where import Control.Lens -import Data.Maybe ( catMaybes - , fromMaybe - ) +import Data.Maybe (catMaybes, fromMaybe) import VeriFuzz.Internal.Gen import VeriFuzz.Internal.Shared import VeriFuzz.Verilog.AST |