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authorYann Herklotz <git@ymhg.org>2019-04-10 23:42:58 +0100
committerYann Herklotz <git@ymhg.org>2019-04-10 23:42:58 +0100
commit186bb5f37770c150bd8e601e9761211af6a9c277 (patch)
tree33ccc13403d1c9a168909b1e9987f29028834396 /src/VeriFuzz/Verilog/Parser.hs
parentaefb46596f3f2302540a83b2be8b042232822a2f (diff)
downloadverismith-186bb5f37770c150bd8e601e9761211af6a9c277.tar.gz
verismith-186bb5f37770c150bd8e601e9761211af6a9c277.zip
Fix the generation of modules and add initialisation
Diffstat (limited to 'src/VeriFuzz/Verilog/Parser.hs')
-rw-r--r--src/VeriFuzz/Verilog/Parser.hs6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/VeriFuzz/Verilog/Parser.hs b/src/VeriFuzz/Verilog/Parser.hs
index 8c9a986..3b07366 100644
--- a/src/VeriFuzz/Verilog/Parser.hs
+++ b/src/VeriFuzz/Verilog/Parser.hs
@@ -259,7 +259,7 @@ parseNetDecl pd = do
range <- option 1 parseRange
name <- identifier
tok' SymSemi
- return . Decl pd . Port t sign range $ name
+ return $ Decl pd (Port t sign range name) Nothing
where type_ = tok KWWire $> Wire <|> tok KWReg $> Reg
parsePortDir :: Parser PortDir
@@ -281,8 +281,8 @@ parseModList :: Parser [Identifier]
parseModList = list <|> return [] where list = parens $ commaSep identifier
filterDecl :: PortDir -> ModItem -> Bool
-filterDecl p (Decl (Just p') _) = p == p'
-filterDecl _ _ = False
+filterDecl p (Decl (Just p') _ _) = p == p'
+filterDecl _ _ = False
modPorts :: PortDir -> [ModItem] -> [Port]
modPorts p mis = filter (filterDecl p) mis ^.. traverse . declPort