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authorYann Herklotz <ymherklotz@gmail.com>2019-02-01 19:48:02 +0000
committerYann Herklotz <ymherklotz@gmail.com>2019-02-01 19:48:02 +0000
commitcedff4da4ee36ed6b3b4c1c20012d96075a87a9f (patch)
tree8e0b489417720499e14dd369d2c77bc811ffeb7b /src/VeriFuzz/Xst.hs
parenta9002d9bfdfa8b6ae0973b7972ce300142c1ded0 (diff)
downloadverismith-cedff4da4ee36ed6b3b4c1c20012d96075a87a9f.tar.gz
verismith-cedff4da4ee36ed6b3b4c1c20012d96075a87a9f.zip
Rename XST and add imports
Diffstat (limited to 'src/VeriFuzz/Xst.hs')
-rw-r--r--src/VeriFuzz/Xst.hs57
1 files changed, 0 insertions, 57 deletions
diff --git a/src/VeriFuzz/Xst.hs b/src/VeriFuzz/Xst.hs
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--- a/src/VeriFuzz/Xst.hs
+++ /dev/null
@@ -1,57 +0,0 @@
-{-|
-Module : VeriFuzz.Simulator.Xst
-Description : Xst (ise) simulator implementation.
-Copyright : (c) 2018-2019, Yann Herklotz Grave
-License : BSD-3
-Maintainer : ymherklotz [at] gmail [dot] com
-Stability : experimental
-Portability : POSIX
-
-Xst (ise) simulator implementation.
--}
-
-{-# LANGUAGE QuasiQuotes #-}
-
-module VeriFuzz.Simulator.Xst where
-
-import Control.Lens hiding ((<.>))
-import qualified Data.Text as T
-import Prelude hiding (FilePath)
-import Shelly
-import System.FilePath.Posix (takeBaseName)
-import Text.Shakespeare.Text (st)
-import VeriFuzz.Simulator.General
-import VeriFuzz.Simulator.Internal.Template
-import VeriFuzz.Verilog
-import VeriFuzz.Verilog
-
-data Xst = Xst { xstPath :: FilePath
- , netgenPath :: FilePath
- }
-
-instance Simulator Xst where
- toText _ = "xst"
-
-instance Synthesize Xst where
- runSynth = runSynthXst
-
-defaultXst :: Xst
-defaultXst =
- Xst "/opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/xst" "/opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/netgen"
-
-runSynthXst :: Xst -> ModDecl -> FilePath -> Sh ()
-runSynthXst sim m outf = do
- writefile xstFile $ xstSynthConfig m
- writefile prjFile [st|verilog work "rtl.v"|]
- writefile "rtl.v" $ genSource m
- echoP "Run xst"
- noPrint $ timeout_ (xstPath sim) ["-ifn", toTextIgnore xstFile]
- echoP "Run netgen"
- noPrint $ run_ (netgenPath sim)
- ["-w", "-ofmt", "verilog", toTextIgnore $ modFile <.> "ngc", toTextIgnore outf]
- echoP "Clean synthesized file"
- noPrint $ run_ "sed" ["-i", "/^`ifndef/,/^`endif/ d; s/ *Timestamp: .*//;", toTextIgnore outf]
- where
- modFile = fromText $ modName m
- xstFile = modFile <.> "xst"
- prjFile = modFile <.> "prj"