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authorYann Herklotz <git@ymhg.org>2019-05-09 23:18:20 +0100
committerYann Herklotz <git@ymhg.org>2019-05-09 23:18:20 +0100
commit06c61e705d952679a6200e7d18d2463723fe5878 (patch)
treed7e7c5c54ef792de2f2f5dfcacdc93d161c44b77 /test/Reduce.hs
parent77702d5492ba19b6e3e0dda9e9460a8bb67a8e3f (diff)
downloadverismith-06c61e705d952679a6200e7d18d2463723fe5878.tar.gz
verismith-06c61e705d952679a6200e7d18d2463723fe5878.zip
Add parser and reducer tests
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+{-|
+Module : Reduce
+Description : Test reduction.
+Copyright : (c) 2019, Yann Herklotz Grave
+License : GPL-3
+Maintainer : ymherklotz [at] gmail [dot] com
+Stability : experimental
+Portability : POSIX
+
+Test reduction.
+-}
+
+{-# LANGUAGE QuasiQuotes #-}
+
+module Reduce
+ (reducerTests)
+where
+
+--import Data.Either (fromRight)
+--import Data.Text (unpack)
+import Test.Tasty
+---import Text.Shakespeare.Text (st)
+--import VeriFuzz
+
+reducerTests :: TestTree
+reducerTests = testGroup "Reducer tests"
+ [ moduleReducer ]
+
+moduleReducer :: TestTree
+moduleReducer = testGroup "Module reducer"
+ [ ]
+
+--reduceOneModule :: TestTree
+--reduceOneModule = undefined
+--
+---- brittany-disable-next-binding
+--moduleIn :: SourceInfo
+--moduleIn = SourceInfo "top" . fromRight (Verilog []) . parseVerilog "" $ unpack [st|
+--module m(x, y);
+--input x;
+--output y;
+--endmodule
+--
+--module top(x, y);
+--input x;
+--output y;
+--m m1(x, y)
+--endmodule
+-- |]
+--