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author | Yann Herklotz <git@yannherklotz.com> | 2019-05-24 15:45:35 +0100 |
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committer | Yann Herklotz <git@yannherklotz.com> | 2019-05-24 15:45:35 +0100 |
commit | 14158fc4ef0809adbbf0b7fdd0c0d5e0fafc2435 (patch) | |
tree | 9109005a77465d3d77d0d696107000bc39601066 /test/Reduce.hs | |
parent | 7e67a69693c4c0964f488d87dd94f64a2efe5409 (diff) | |
download | verismith-14158fc4ef0809adbbf0b7fdd0c0d5e0fafc2435.tar.gz verismith-14158fc4ef0809adbbf0b7fdd0c0d5e0fafc2435.zip |
Fix used wire check for clk
Diffstat (limited to 'test/Reduce.hs')
-rw-r--r-- | test/Reduce.hs | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/test/Reduce.hs b/test/Reduce.hs index 9c59e48..bc4bbc3 100644 --- a/test/Reduce.hs +++ b/test/Reduce.hs @@ -52,6 +52,7 @@ module top; reg h; wire i; wire j; + wire clk; initial d <= a; always @* begin @@ -62,6 +63,8 @@ module top; end end + always @(posedge clk); + assign b = g; endmodule |] @@ -74,6 +77,7 @@ module top; reg f; reg g; reg h; + wire clk; initial d <= a; always @* begin @@ -84,6 +88,8 @@ module top; end end + always @(posedge clk); + assign b = g; endmodule |] |