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author | Yann Herklotz <ymherklotz@gmail.com> | 2018-11-08 17:39:09 +0000 |
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committer | Yann Herklotz <ymherklotz@gmail.com> | 2018-11-08 17:39:09 +0000 |
commit | d16507bca82b3ffe4f583ef8f4893722c9d04239 (patch) | |
tree | 334e54cf929aeae7382ec726a00cf8ec6d80a396 /test/simple.v | |
parent | e7f7d1988ad9a161ba10e36859dc04a92422a4e0 (diff) | |
download | verismith-d16507bca82b3ffe4f583ef8f4893722c9d04239.tar.gz verismith-d16507bca82b3ffe4f583ef8f4893722c9d04239.zip |
Rename folder to examples
Diffstat (limited to 'test/simple.v')
-rw-r--r-- | test/simple.v | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/test/simple.v b/test/simple.v deleted file mode 100644 index 5198d3d..0000000 --- a/test/simple.v +++ /dev/null @@ -1,23 +0,0 @@ -module and_comb(in1, in2, out); - input in1; - input in2; - output out; - - assign out = in1 & in2; -endmodule - -module main; - reg a, b; - wire c; - - and_comb gate(.in1(a), .in2(b), .out(c)); - - initial - begin - a = 1'b1; - b = 1'b1; - #1 - $display("%d & %d = %d", a, b, c); - $finish; - end -endmodule |