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| author | Yann Herklotz <git@ymhg.org> | 2019-04-14 20:21:50 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@ymhg.org> | 2019-04-14 20:21:50 +0100 |
| commit | 5480c962bba808a652dd53eb7f9857f1c887378d (patch) | |
| tree | ada1c53c000f269f72cbd8ef08088fc04a51713d /verifuzz.cabal | |
| parent | 457964522dfdd369bff4b3325a25388b3c22d6ac (diff) | |
| download | verismith-5480c962bba808a652dd53eb7f9857f1c887378d.tar.gz verismith-5480c962bba808a652dd53eb7f9857f1c887378d.zip | |
Update cabal with added modules
Diffstat (limited to 'verifuzz.cabal')
| -rw-r--r-- | verifuzz.cabal | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/verifuzz.cabal b/verifuzz.cabal index 5ed7497..646d972 100644 --- a/verifuzz.cabal +++ b/verifuzz.cabal @@ -39,6 +39,7 @@ library , VeriFuzz.Sim.Env , VeriFuzz.Sim.Icarus , VeriFuzz.Sim.Internal + , VeriFuzz.Sim.Quartus , VeriFuzz.Sim.Reduce , VeriFuzz.Sim.Template , VeriFuzz.Sim.Vivado @@ -46,7 +47,9 @@ library , VeriFuzz.Sim.Yosys , VeriFuzz.Verilog , VeriFuzz.Verilog.AST + , VeriFuzz.Verilog.BitVec , VeriFuzz.Verilog.CodeGen + , VeriFuzz.Verilog.Eval , VeriFuzz.Verilog.Gen , VeriFuzz.Verilog.Internal , VeriFuzz.Verilog.Lex @@ -73,6 +76,9 @@ library , transformers >=0.5 && <0.6 , tomland >=0.5 && <0.6 , array >=0.5 && <0.6 + , recursion-schemes >=5.1 && <5.2 + , prettyprinter >= 1.2.1 && < 1.3 + , time >= 1.8.0.2 && <1.9 default-extensions: OverloadedStrings executable verifuzz |