diff options
| -rw-r--r-- | src/Test/VeriFuzz/Verilog/AST.hs | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/Test/VeriFuzz/Verilog/AST.hs b/src/Test/VeriFuzz/Verilog/AST.hs index 288fb2e..6f6e930 100644 --- a/src/Test/VeriFuzz/Verilog/AST.hs +++ b/src/Test/VeriFuzz/Verilog/AST.hs @@ -210,9 +210,9 @@ data ContAssign = ContAssign { _contAssignNetLVal :: Identifier } deriving (Eq) -- | Stmnts in Verilog. -data Stmnt = TimeCtrl { _statDelay :: Delay - , _statDStat :: Maybe Stmnt - } -- ^ Time control (@#NUM@) +data Stmnt = TimeCtrl { _statDelay :: Delay + , _statDStat :: Maybe Stmnt + } -- ^ Time control (@#NUM@) | EventCtrl { _statEvent :: Event , _statEStat :: Maybe Stmnt } |