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-rw-r--r-- | LICENSE | 2 |
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@@ -1,4 +1,4 @@ -Copyright Author name here (c) 2018 +Copyright Yann Herklotz Grave (c) 2018 All rights reserved. |
index : verismith | ||
Verilog Fuzzer to test the major simulators and sythesisers by generating random, valid Verilog. |
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