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Diffstat (limited to 'README.md')
-rw-r--r-- | README.md | 11 |
1 files changed, 8 insertions, 3 deletions
@@ -1,5 +1,10 @@ -![Build Status](https://travis-ci.com/ymherklotz/verifuzz.svg?token=qfBKKGwxeWkjDsy7e16x&branch=master) +# VeriFuzz ![Build Status](https://travis-ci.com/ymherklotz/verifuzz.svg?token=qfBKKGwxeWkjDsy7e16x&branch=master) -# verifuzz +Verilog Fuzzer to test the major verilog compilers by generating random, valid +verilog. -Verilog Fuzzer to test the major verilog compilers by generating random, valid verilog. +It currently supports the following simulators: + +- [Yosys](http://www.clifford.at/yosys/) +- [Icarus Verilog](http://iverilog.icarus.com) +- [Xst](https://www.xilinx.com/support/documentation/sw_manuals/xilinx11/ise_c_using_xst_for_synthesis.htm) |