2 files changed, 3 insertions, 3 deletions
diff --git a/src/Test/VeriFuzz/Graph/ASTGen.hs b/src/Test/VeriFuzz/Graph/ASTGen.hs
index 2a82592..00ec88b 100644
--- a/src/Test/VeriFuzz/Graph/ASTGen.hs
+++ b/src/Test/VeriFuzz/Graph/ASTGen.hs
@@ -42,7 +42,7 @@ outputsC c =
 
 genPortsAST :: (Circuit -> [Node]) -> Circuit -> [Port]
 genPortsAST f c =
-  (port . frNode <$> f c)
+  port . frNode <$> f c
   where
     port = Port Wire 1
 
@@ -50,7 +50,7 @@ genPortsAST f c =
 -- assignment expressions.
 genAssignExpr :: Gate -> [Node] -> Maybe Expr
 genAssignExpr g [] = Nothing
-genAssignExpr g (n:[]) = Just . Id $ frNode n
+genAssignExpr g [n] = Just . Id $ frNode n
 genAssignExpr g (n:ns) = BinOp wire op <$> genAssignExpr g ns
   where
     wire = Id $ frNode n
diff --git a/src/Test/VeriFuzz/Graph/Random.hs b/src/Test/VeriFuzz/Graph/Random.hs
index fa72f2f..9483bdf 100644
--- a/src/Test/VeriFuzz/Graph/Random.hs
+++ b/src/Test/VeriFuzz/Graph/Random.hs
@@ -46,7 +46,7 @@ randomDAG :: (Arbitrary l, Arbitrary e, Eq l, Eq e)
                           -- generate random instances of each node
 randomDAG = do
   list <- QC.infiniteListOf QC.arbitrary
-  l <- QC.infiniteListOf $ aE
+  l <- QC.infiniteListOf aE
   QC.sized (\n -> return . G.mkGraph (nodes list n) $ take (10*n) l)
     where
       nodes l n = zip [0..n] $ take n l