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-rw-r--r--src/Test/VeriFuzz/Simulator/General.hs24
1 files changed, 18 insertions, 6 deletions
diff --git a/src/Test/VeriFuzz/Simulator/General.hs b/src/Test/VeriFuzz/Simulator/General.hs
index d52b7cd..c7dfd99 100644
--- a/src/Test/VeriFuzz/Simulator/General.hs
+++ b/src/Test/VeriFuzz/Simulator/General.hs
@@ -12,9 +12,18 @@ Class of the simulator and the synthesize tool.
module Test.VeriFuzz.Simulator.General where
-import Data.Text (Text)
-import Prelude hiding (FilePath)
+import Data.ByteString.Builder (byteStringHex, toLazyByteString)
+import Data.ByteString.Char8 (ByteString)
+import qualified Data.ByteString.Char8 as B
+import qualified Data.ByteString.Lazy.Char8 as BL
+import Data.Text (Text)
+import qualified Data.Text as T
+import qualified Data.Text.Lazy as TL
+import Data.Text.Lazy.Builder (toLazyText)
+import Data.Text.Lazy.Builder.Int (hexadecimal)
+import Prelude hiding (FilePath)
import Shelly
+import Test.VeriFuzz.Internal.Shared
import Test.VeriFuzz.Verilog.AST
-- | Simulator class.
@@ -23,10 +32,10 @@ class Simulator a where
-- | Simulation type class.
class (Simulator a) => Simulate a where
- runSim :: a -- ^ Simulator instance
- -> ModDecl -- ^ Module to simulate
- -> [Int] -- ^ Inputs to simulate
- -> Sh Int -- ^ Returns the value of the hash at the output of the testbench
+ runSim :: a -- ^ Simulator instance
+ -> ModDecl -- ^ Module to simulate
+ -> [ByteString] -- ^ Inputs to simulate
+ -> Sh Int -- ^ Returns the value of the hash at the output of the testbench.
-- | Synthesize type class.
class (Simulator a) => Synthesize a where
@@ -46,3 +55,6 @@ synthesizers = ["yosys", "xst"]
simulators :: [Text]
simulators = ["yosim", "iverilog"]
+
+toHex :: ByteString -> Text
+toHex bs = T.pack . BL.unpack . toLazyByteString $ byteStringHex bs