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Diffstat (limited to 'src/Test/VeriFuzz/Verilog/CodeGen.hs')
| -rw-r--r-- | src/Test/VeriFuzz/Verilog/CodeGen.hs | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/Test/VeriFuzz/Verilog/CodeGen.hs b/src/Test/VeriFuzz/Verilog/CodeGen.hs index 4fecaec..d0b1fec 100644 --- a/src/Test/VeriFuzz/Verilog/CodeGen.hs +++ b/src/Test/VeriFuzz/Verilog/CodeGen.hs @@ -14,6 +14,7 @@ This module generates the code from the Verilog AST defined in module Test.VeriFuzz.Verilog.CodeGen where import Control.Lens +import Data.Foldable (fold) import Data.Maybe (fromMaybe, isNothing) import Data.Text (Text) import qualified Data.Text as T |