diff options
Diffstat (limited to 'src/Test/VeriFuzz/Verilog/Mutate.hs')
-rw-r--r-- | src/Test/VeriFuzz/Verilog/Mutate.hs | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/Test/VeriFuzz/Verilog/Mutate.hs b/src/Test/VeriFuzz/Verilog/Mutate.hs index 258af84..4c032e7 100644 --- a/src/Test/VeriFuzz/Verilog/Mutate.hs +++ b/src/Test/VeriFuzz/Verilog/Mutate.hs @@ -82,8 +82,8 @@ nestUpTo i src = -- -- >>> SrcShow $ instantiateMod (ModDecl (Identifier "m") [Port (PortNet Wire) 5 (Identifier "y")] [Port (PortNet Wire) 5 "x"] []) (ModDecl "main" [] [] []) -- module main; --- wire y; --- reg x; +-- wire [4:0] y; +-- reg [4:0] x; -- endmodule -- <BLANKLINE> instantiateMod :: ModDecl -> ModDecl -> ModDecl |