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-rw-r--r--src/VeriFuzz.hs2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/VeriFuzz.hs b/src/VeriFuzz.hs
index 21acf10..d583610 100644
--- a/src/VeriFuzz.hs
+++ b/src/VeriFuzz.hs
@@ -87,7 +87,7 @@ runSimulation = do
-- head $ (nestUpTo 30 . generateAST $ Circuit gr) ^.. getVerilogSrc . traverse . getDescription
rand <- genRandom 20
rand2 <- QC.generate (randomMod 10 100)
- val <- shelly $ runSim defaultIcarus (rand2) rand
+ val <- shelly $ runSim defaultIcarus rand2 rand
T.putStrLn $ showBS val
onFailure :: Text -> RunFailed -> Sh ()