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Diffstat (limited to 'src/VeriFuzz/ASTGen.hs')
-rw-r--r-- | src/VeriFuzz/ASTGen.hs | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/VeriFuzz/ASTGen.hs b/src/VeriFuzz/ASTGen.hs index d113bbb..6bac157 100644 --- a/src/VeriFuzz/ASTGen.hs +++ b/src/VeriFuzz/ASTGen.hs @@ -10,7 +10,9 @@ Portability : POSIX Generates the AST from the graph directly. -} -module VeriFuzz.ASTGen where +module VeriFuzz.ASTGen + ( generateAST + ) where import Control.Lens ((^..)) import Data.Foldable (fold) @@ -35,9 +37,6 @@ fromGate Xor = BinXor inputsC :: Circuit -> [Node] inputsC c = inputs (getCircuit c) -outputsC :: Circuit -> [Node] -outputsC c = outputs (getCircuit c) - genPortsAST :: (Circuit -> [Node]) -> Circuit -> [Port] genPortsAST f c = port . frNode <$> f c where port = Port Wire 4 |