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-rw-r--r--src/VeriFuzz/Graph/ASTGen.hs10
-rw-r--r--src/VeriFuzz/Graph/CodeGen.hs3
-rw-r--r--src/VeriFuzz/Graph/Random.hs2
-rw-r--r--src/VeriFuzz/Graph/RandomAlt.hs1
4 files changed, 6 insertions, 10 deletions
diff --git a/src/VeriFuzz/Graph/ASTGen.hs b/src/VeriFuzz/Graph/ASTGen.hs
index 2b241e1..f7bd058 100644
--- a/src/VeriFuzz/Graph/ASTGen.hs
+++ b/src/VeriFuzz/Graph/ASTGen.hs
@@ -16,10 +16,8 @@ import Data.Foldable (fold)
import Data.Graph.Inductive (LNode, Node)
import qualified Data.Graph.Inductive as G
import Data.Maybe (catMaybes)
-import qualified Data.Text as T
import VeriFuzz.Circuit
import VeriFuzz.Internal.Gen
-import VeriFuzz.Internal.Shared
import VeriFuzz.Verilog.AST
import VeriFuzz.Verilog.Helpers
@@ -51,8 +49,8 @@ genPortsAST f c =
-- | Generates the nested expression AST, so that it can then generate the
-- assignment expressions.
genAssignExpr :: Gate -> [Node] -> Maybe Expr
-genAssignExpr g [] = Nothing
-genAssignExpr g [n] = Just . Id $ frNode n
+genAssignExpr _ [] = Nothing
+genAssignExpr _ [n] = Just . Id $ frNode n
genAssignExpr g (n:ns) = BinOp wire op <$> genAssignExpr g ns
where
wire = Id $ frNode n
@@ -75,9 +73,9 @@ genAssignAST c = catMaybes $ genContAssignAST c <$> nodes
nodes = G.labNodes gr
genModuleDeclAST :: Circuit -> ModDecl
-genModuleDeclAST c = ModDecl id output ports items
+genModuleDeclAST c = ModDecl i output ports items
where
- id = Identifier "gen_module"
+ i = Identifier "gen_module"
ports = genPortsAST inputsC c
output = [Port Wire 90 "y"]
items = genAssignAST c ++ [ModCA . ContAssign "y" . fold $ portToExpr <$> ports]
diff --git a/src/VeriFuzz/Graph/CodeGen.hs b/src/VeriFuzz/Graph/CodeGen.hs
index 0d23044..57e7b2a 100644
--- a/src/VeriFuzz/Graph/CodeGen.hs
+++ b/src/VeriFuzz/Graph/CodeGen.hs
@@ -15,8 +15,7 @@ module VeriFuzz.Graph.CodeGen
) where
import Data.Foldable (fold)
-import Data.Graph.Inductive (Graph, LNode, Node, indeg, labNodes,
- nodes, outdeg, pre)
+import Data.Graph.Inductive (Graph, LNode, Node, labNodes, pre)
import Data.Maybe (fromMaybe)
import Data.Text (Text)
import qualified Data.Text as T
diff --git a/src/VeriFuzz/Graph/Random.hs b/src/VeriFuzz/Graph/Random.hs
index 0514f6d..ef0a0c5 100644
--- a/src/VeriFuzz/Graph/Random.hs
+++ b/src/VeriFuzz/Graph/Random.hs
@@ -12,7 +12,7 @@ Define the random generation for the directed acyclic graph.
module VeriFuzz.Graph.Random where
-import Data.Graph.Inductive (Context, Graph, LEdge)
+import Data.Graph.Inductive (Context, LEdge)
import qualified Data.Graph.Inductive as G
import Data.Graph.Inductive.PatriciaTree (Gr)
import Data.List (nub)
diff --git a/src/VeriFuzz/Graph/RandomAlt.hs b/src/VeriFuzz/Graph/RandomAlt.hs
index d9ee138..21ef678 100644
--- a/src/VeriFuzz/Graph/RandomAlt.hs
+++ b/src/VeriFuzz/Graph/RandomAlt.hs
@@ -12,7 +12,6 @@ Define the random generation for the directed acyclic graph.
module VeriFuzz.Graph.RandomAlt where
-import Data.Graph.Inductive (Graph, LEdge, mkGraph)
import qualified Data.Graph.Inductive.Arbitrary as G
import Data.Graph.Inductive.PatriciaTree (Gr)
import Test.QuickCheck (Arbitrary, Gen)