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-rw-r--r--src/VeriFuzz/Mutate.hs2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/VeriFuzz/Mutate.hs b/src/VeriFuzz/Mutate.hs
index 15eac90..21911b6 100644
--- a/src/VeriFuzz/Mutate.hs
+++ b/src/VeriFuzz/Mutate.hs
@@ -79,7 +79,7 @@ allVars m =
-- $setup
-- >>> import VeriFuzz.CodeGen
--- >>> let m = (ModDecl (Identifier "m") [Port Wire 5 (Identifier "y")] [Port Wire 5 "x"] [])
+-- >>> let m = (ModDecl (Identifier "m") [Port Wire False 5 (Identifier "y")] [Port Wire False 5 "x"] [])
-- >>> let main = (ModDecl "main" [] [] [])
-- | Add a Module Instantiation using 'ModInst' from the first module passed to