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-rw-r--r--src/VeriFuzz/Parser.hs6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/VeriFuzz/Parser.hs b/src/VeriFuzz/Parser.hs
index b4831d1..fa44202 100644
--- a/src/VeriFuzz/Parser.hs
+++ b/src/VeriFuzz/Parser.hs
@@ -13,7 +13,8 @@ whole Verilog syntax, as the AST does not support it either.
module VeriFuzz.Parser
( -- * Parsers
- parseVerilogSrc
+ parseVerilog
+ , parseVerilogSrc
, parseDescription
, parseModDecl
, parseContAssign
@@ -212,3 +213,6 @@ parseDescription = Description <$> lexeme parseModDecl
parseVerilogSrc :: Parser VerilogSrc
parseVerilogSrc = VerilogSrc <$> (whiteSpace *> (many parseDescription))
+
+parseVerilog :: String -> String -> Either ParseError VerilogSrc
+parseVerilog f s = parse parseVerilogSrc f s