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-rw-r--r--src/VeriFuzz/Sim/Yosys.hs2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/VeriFuzz/Sim/Yosys.hs b/src/VeriFuzz/Sim/Yosys.hs
index b2ad5cb..b7fae6b 100644
--- a/src/VeriFuzz/Sim/Yosys.hs
+++ b/src/VeriFuzz/Sim/Yosys.hs
@@ -32,7 +32,7 @@ import VeriFuzz.Verilog.AST
import VeriFuzz.Verilog.CodeGen
import VeriFuzz.Verilog.Mutate
-data Yosys = Yosys { yosysBin :: {-# UNPACK #-} !(Maybe FilePath)
+data Yosys = Yosys { yosysBin :: !(Maybe FilePath)
, yosysDesc :: {-# UNPACK #-} !Text
, yosysOutput :: {-# UNPACK #-} !FilePath
}