aboutsummaryrefslogtreecommitdiffstats
path: root/src/VeriFuzz/Verilog/CodeGen.hs
diff options
context:
space:
mode:
Diffstat (limited to 'src/VeriFuzz/Verilog/CodeGen.hs')
-rw-r--r--src/VeriFuzz/Verilog/CodeGen.hs16
1 files changed, 7 insertions, 9 deletions
diff --git a/src/VeriFuzz/Verilog/CodeGen.hs b/src/VeriFuzz/Verilog/CodeGen.hs
index 82945aa..56e2819 100644
--- a/src/VeriFuzz/Verilog/CodeGen.hs
+++ b/src/VeriFuzz/Verilog/CodeGen.hs
@@ -3,7 +3,7 @@ Module : VeriFuzz.Verilog.CodeGen
Description : Code generation for Verilog AST.
Copyright : (c) 2018-2019, Yann Herklotz
License : BSD-3
-Maintainer : ymherklotz [at] gmail [dot] com
+Maintainer : yann [at] yannherklotz [dot] com
Stability : experimental
Portability : POSIX
@@ -22,15 +22,13 @@ module VeriFuzz.Verilog.CodeGen
)
where
-import Data.Data ( Data )
-import Data.List.NonEmpty ( NonEmpty(..)
- , toList
- )
-import Data.Text ( Text )
-import qualified Data.Text as T
+import Data.Data (Data)
+import Data.List.NonEmpty (NonEmpty (..), toList)
+import Data.Text (Text)
+import qualified Data.Text as T
import Data.Text.Prettyprint.Doc
-import Numeric ( showHex )
-import VeriFuzz.Internal hiding ( comma )
+import Numeric (showHex)
+import VeriFuzz.Internal hiding (comma)
import VeriFuzz.Verilog.AST
import VeriFuzz.Verilog.BitVec