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-rw-r--r--src/VeriFuzz/Verilog/Mutate.hs2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/VeriFuzz/Verilog/Mutate.hs b/src/VeriFuzz/Verilog/Mutate.hs
index 501d217..36cdb9b 100644
--- a/src/VeriFuzz/Verilog/Mutate.hs
+++ b/src/VeriFuzz/Verilog/Mutate.hs
@@ -107,7 +107,7 @@ instantiateMod mod main =
-- | Instantiate without adding wire declarations. It also does not count the
-- current instantiations of the same module.
--
--- >>> instantiateMod_ mod main
+-- >>> instantiateMod_ mod
-- m m(y, x);
-- <BLANKLINE>
instantiateMod_ :: ModDecl -> ModItem