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Diffstat (limited to 'src/VeriFuzz/Verilog/Mutate.hs')
| -rw-r--r-- | src/VeriFuzz/Verilog/Mutate.hs | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/VeriFuzz/Verilog/Mutate.hs b/src/VeriFuzz/Verilog/Mutate.hs index 39a136e..7b93633 100644 --- a/src/VeriFuzz/Verilog/Mutate.hs +++ b/src/VeriFuzz/Verilog/Mutate.hs @@ -33,6 +33,7 @@ module VeriFuzz.Verilog.Mutate , combineAssigns , combineAssigns_ , declareMod + , fromPort ) where @@ -284,3 +285,6 @@ combineAssigns_ p ps = <$> ps ^.. traverse . portName + +fromPort :: Port -> Identifier +fromPort (Port _ _ _ i) = i |