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-rw-r--r--src/VeriFuzz/Verilog/CodeGen.hs4
-rw-r--r--src/VeriFuzz/Verilog/Gen.hs3
2 files changed, 4 insertions, 3 deletions
diff --git a/src/VeriFuzz/Verilog/CodeGen.hs b/src/VeriFuzz/Verilog/CodeGen.hs
index 361d27e..e31866c 100644
--- a/src/VeriFuzz/Verilog/CodeGen.hs
+++ b/src/VeriFuzz/Verilog/CodeGen.hs
@@ -146,7 +146,7 @@ expr (Str t ) = "\"" <> t <> "\""
showNum :: BitVec -> Text
showNum (BitVec s n) =
- "(" <> minus <> showT s <> "'h" <> T.pack (showHex (abs n) "") <> ")"
+ minus <> showT s <> "'h" <> T.pack (showHex (abs n) "")
where
minus | signum n >= 0 = ""
| otherwise = "-"
@@ -211,7 +211,7 @@ event a = "@(" <> eventRec a <> ")"
eventRec :: Event -> Text
eventRec (EId i) = getIdentifier i
eventRec (EExpr e) = expr e
-eventRec EAll = "@*"
+eventRec EAll = "*"
eventRec (EPosEdge i) = "posedge " <> getIdentifier i
eventRec (ENegEdge i) = "negedge " <> getIdentifier i
eventRec (EOr a b) = "(" <> eventRec a <> " or " <> eventRec b <> ")"
diff --git a/src/VeriFuzz/Verilog/Gen.hs b/src/VeriFuzz/Verilog/Gen.hs
index 6159766..bf9f84d 100644
--- a/src/VeriFuzz/Verilog/Gen.hs
+++ b/src/VeriFuzz/Verilog/Gen.hs
@@ -347,8 +347,9 @@ eventList = do
always :: StateGen ModItem
always = do
+ events <- eventList
stat <- SeqBlock <$> some statement
- return $ Always (EventCtrl (EPosEdge "clk") (Just stat))
+ return $ Always (EventCtrl events (Just stat))
instantiate :: ModDecl -> StateGen ModItem
instantiate (ModDecl i outP inP _ _) = do