diff options
Diffstat (limited to 'src/VeriFuzz/Verilog')
-rw-r--r-- | src/VeriFuzz/Verilog/AST.hs | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/VeriFuzz/Verilog/AST.hs b/src/VeriFuzz/Verilog/AST.hs index 30634c0..8adf58e 100644 --- a/src/VeriFuzz/Verilog/AST.hs +++ b/src/VeriFuzz/Verilog/AST.hs @@ -119,6 +119,8 @@ module VeriFuzz.Verilog.AST , modInstId , modInstName , modInstConns + , _Initial + , _Always , paramDecl , localParamDecl , traverseModItem @@ -420,6 +422,9 @@ data Statement = TimeCtrl { _statDelay :: {-# UNPACK #-} !Delay } -- ^ Loop bounds shall be statically computable for a for loop. deriving (Eq, Show, Ord, Data) +instance Plated Statement where + plate = uniplate + instance Semigroup Statement where (SeqBlock a) <> (SeqBlock b) = SeqBlock $ a <> b (SeqBlock a) <> b = SeqBlock $ a <> [b] @@ -504,6 +509,7 @@ $(makeLenses ''SourceInfo) $(makeWrapped ''Verilog) $(makeWrapped ''Identifier) $(makeWrapped ''Delay) +$(makePrisms ''ModItem) $(makeBaseFunctor ''Event) $(makeBaseFunctor ''Expr) |