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-rw-r--r--src/Verismith/Verilog/AST.hs6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/Verismith/Verilog/AST.hs b/src/Verismith/Verilog/AST.hs
index 699d87a..fbe4347 100644
--- a/src/Verismith/Verilog/AST.hs
+++ b/src/Verismith/Verilog/AST.hs
@@ -524,6 +524,12 @@ data SourceInfo = SourceInfo { _infoTop :: {-# UNPACK #-} !Text
}
deriving (Eq, Show, Ord, Data, Generic, NFData)
+instance Semigroup SourceInfo where
+ (SourceInfo t v) <> (SourceInfo _ v2) = SourceInfo t $ v <> v2
+
+instance Monoid SourceInfo where
+ mempty = SourceInfo mempty mempty
+
$(makeLenses ''Expr)
$(makeLenses ''ConstExpr)
$(makeLenses ''Task)