diff options
Diffstat (limited to 'tests/Unit.hs')
-rw-r--r-- | tests/Unit.hs | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/tests/Unit.hs b/tests/Unit.hs index 67f642c..de4fa16 100644 --- a/tests/Unit.hs +++ b/tests/Unit.hs @@ -38,12 +38,3 @@ trans e = PrimExpr . PrimId $ Identifier "Replaced" else PrimExpr (PrimId id) _ -> e - -runMain = do - gr <- genRandomDAG 100 :: IO (G.Gr Gate ()) --- _ <- runGraphviz (graphToDot quickParams $ emap (const "") gr) Png "output.png", --- T.putStrLn $ generate gr - --g <- QC.generate (QC.arbitrary :: QC.Gen VerilogSrc) - let x = generateAST $ Circuit gr - let y = head . reverse $ x ^.. getVerilogSrc . traverse . getDescription . moduleItems . traverse . _ModCA . contAssignExpr - print $ transformOf traverseExpr trans y |