| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add shelly and equiv to gitignore | Yann Herklotz | 2019-01-21 | 1 | -0/+2 |
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| * | Add .gitignore | Yann Herklotz | 2018-11-16 | 1 | -0/+5 |
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index : verismith | |
| Verilog Fuzzer to test the major simulators and sythesisers by generating random, valid Verilog. |
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path: root/.gitignore