| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | | Add all vim backup files to gitignore | Yann Herklotz | 2019-07-21 | 1 | -1/+2 | |
| * | | Add the shell.nix | Yann Herklotz | 2019-07-21 | 1 | -0/+25 | |
| * | | Add nix style build | Yann Herklotz | 2019-07-20 | 6 | -0/+112 | |
| * | | Multiple initialisations now appearing | Yann Herklotz | 2019-07-20 | 3 | -12/+25 | |
| * | | Fix missing module instantiation | Yann Herklotz | 2019-07-09 | 1 | -1/+1 | |
| * | | Broken fix for modport | Yann Herklotz | 2019-05-20 | 1 | -11/+19 | |
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| * | Format using brittany | Yann Herklotz | 2019-05-20 | 2 | -4/+9 | |
| * | Only compare against the identity synth | Yann Herklotz | 2019-05-20 | 3 | -5/+6 | |
| * | Merge branch 'master' of github.com:ymherklotz/verifuzz | Yann Herklotz | 2019-05-20 | 3 | -43/+66 | |
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| | * | Change simple graph check to acyclic check | Yann Herklotz | 2019-05-19 | 3 | -32/+52 | |
| | * | Merge branch 'master' of github.com:ymherklotz/verifuzz | Yann Herklotz | 2019-05-18 | 3 | -16/+48 | |
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| | * | | Add colour to the report | Yann Herklotz | 2019-05-18 | 1 | -32/+35 | |
| * | | | Only modify expressions in swarm testing | Yann Herklotz | 2019-05-20 | 2 | -30/+7 | |
| * | | | Rename script | Yann Herklotz | 2019-05-20 | 1 | -0/+30 | |
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| * | | add statistics script | Yann Herklotz | 2019-05-18 | 1 | -0/+23 | |
| * | | Add support for ghc-8.4.2 | Yann Herklotz | 2019-05-15 | 2 | -16/+25 | |
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| * | Add test for removing unused wires | Yann Herklotz | 2019-05-15 | 1 | -0/+54 | |
| * | Add ability to clean up verilog file | Yann Herklotz | 2019-05-15 | 1 | -3/+115 | |
| * | Remove modConn lens and replace by modExpr | Yann Herklotz | 2019-05-15 | 2 | -4/+3 | |
| * | Add test for clean all | Yann Herklotz | 2019-05-14 | 1 | -4/+67 | |
| * | Use Identifier instead of Text | Yann Herklotz | 2019-05-14 | 1 | -3/+3 | |
| * | Add cleaning on all modules | Yann Herklotz | 2019-05-14 | 1 | -17/+24 | |
| * | Add reduction for multiple modules | Yann Herklotz | 2019-05-14 | 1 | -29/+72 | |
| * | Add test for clean function | Yann Herklotz | 2019-05-14 | 1 | -6/+78 | |
| * | Optimisations in the generation | Yann Herklotz | 2019-05-14 | 1 | -6/+4 | |
| * | Add lens to focus on specific module | Yann Herklotz | 2019-05-14 | 1 | -0/+15 | |
| * | Fix initialisation of flip flops in xilinx_7 | Yann Herklotz | 2019-05-14 | 1 | -1209/+916 | |
| * | Add renameSource | Yann Herklotz | 2019-05-14 | 1 | -0/+5 | |
| * | Format with brittany | Yann Herklotz | 2019-05-13 | 15 | -430/+474 | |
| * | Fix report generation for fuzz run | Yann Herklotz | 2019-05-13 | 1 | -3/+10 | |
| * | Add more reporting to equivalence check | Yann Herklotz | 2019-05-13 | 3 | -8/+22 | |
| * | Add optimisation to check if at bottom | Yann Herklotz | 2019-05-13 | 1 | -17/+40 | |
| * | Add Identity to synthesisers | Yann Herklotz | 2019-05-13 | 1 | -0/+5 | |
| * | Add reduction to fuzz run | Yann Herklotz | 2019-05-13 | 2 | -3/+34 | |
| * | Add html output for report | Yann Herklotz | 2019-05-13 | 2 | -15/+55 | |
| * | Inverse case statement | Yann Herklotz | 2019-05-13 | 1 | -3/+3 | |
| * | Add ResultT to Sh conversion | Yann Herklotz | 2019-05-13 | 3 | -2/+13 | |
| * | Add reducer function for two arbitrary Synthesiser | Yann Herklotz | 2019-05-13 | 1 | -4/+13 | |
| * | Remove Maybe from equivalence check | Yann Herklotz | 2019-05-13 | 3 | -23/+16 | |
| * | Add NonEmpty to tests | Yann Herklotz | 2019-05-13 | 4 | -27/+26 | |
| * | Add Identity to Report | Yann Herklotz | 2019-05-13 | 2 | -23/+48 | |
| * | Add reduction for the commandline | Yann Herklotz | 2019-05-13 | 2 | -43/+97 | |
| * | Use NonEmpty to represent concatenation | Yann Herklotz | 2019-05-13 | 3 | -16/+16 | |
| * | Change the arguments to Text in the Parser | Yann Herklotz | 2019-05-13 | 3 | -10/+31 | |
| * | Add Identity synthesiser | Yann Herklotz | 2019-05-13 | 2 | -0/+45 | |
| * | Remove modules that required $time | Yann Herklotz | 2019-05-12 | 1 | -310/+0 | |
| * | Remove double inv | Yann Herklotz | 2019-05-12 | 1 | -10/+0 | |
| * | Add BUF* to xilinx modules | Yann Herklotz | 2019-05-12 | 1 | -0/+963 | |
| * | Add all the flip flops and latches | Yann Herklotz | 2019-05-12 | 1 | -114/+728 | |
| * | Add FDE cell to xilinx | Yann Herklotz | 2019-05-12 | 1 | -0/+11 | |
 |
index : verismith | |
| Verilog Fuzzer to test the major simulators and sythesisers by generating random, valid Verilog. |
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