Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Replace by the unisims model | Yann Herklotz | 2019-05-06 | 1 | -13/+7 |
* | [Fix #49] Add LDPE cell to xilinx | Yann Herklotz | 2019-05-06 | 1 | -24/+39 |
* | Fix cells_xilinx_7.v LD and FD modules | Yann Herklotz | 2019-04-23 | 1 | -17/+0 |
* | Fix some errors in the templates | Yann Herklotz | 2019-04-23 | 1 | -0/+52 |
* | Add more primitives to data/ | Yann Herklotz | 2019-04-06 | 1 | -0/+64 |
* | Add missing modules when using always blocks | Yann Herklotz | 2019-04-03 | 1 | -75/+95 |
* | Add data folder with extra modules | Yann Herklotz | 2019-01-19 | 1 | -0/+128 |