| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Renaming to VeriSmith | Yann Herklotz | 2019-09-04 | 1 | -45/+0 |
| * | Change name from VeriFuzz to VeriSmith | Yann Herklotz | 2019-08-29 | 1 | -9/+9 |
| * | Add new maintainer email | Yann Herklotz | 2019-07-23 | 1 | -3/+3 |
| * | Format files | Yann Herklotz | 2019-06-29 | 1 | -2/+2 |
| * | Changes to general types | Yann Herklotz | 2019-04-14 | 1 | -1/+1 |
| * | Add Parameter type and remove Description | Yann Herklotz | 2019-04-09 | 1 | -1/+0 |
| * | Large refactor with passing tests | Yann Herklotz | 2019-04-02 | 1 | -22/+25 |
| * | Fix Circuit types | Yann Herklotz | 2019-04-02 | 1 | -5/+4 |
| * | Change license name | Yann Herklotz | 2019-03-30 | 1 | -1/+1 |
| * | Indent by 4 | Yann Herklotz Grave | 2019-02-17 | 1 | -5/+5 |
| * | Brittany formatting | Yann Herklotz Grave | 2019-02-17 | 1 | -1/+2 |
| * | Add export lists | Yann Herklotz Grave | 2019-02-16 | 1 | -1/+6 |
| * | Reformat with stylish-haskell | Yann Herklotz | 2019-01-19 | 1 | -3/+1 |
| * | Add brittany formatting instead of stylish-haskell | Yann Herklotz | 2019-01-19 | 1 | -1/+3 |
| * | Rename files out of the module | Yann Herklotz | 2019-01-10 | 1 | -0/+38 |
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index : verismith | |
| Verilog Fuzzer to test the major simulators and sythesisers by generating random, valid Verilog. |
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