Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Add verilog modules to equivalence checking | Yann Herklotz | 2019-04-03 | 1 | -1/+1 |
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* | Add quick fix to run without dsp48 | Yann Herklotz | 2019-04-03 | 2 | -2/+3 |
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* | Add Vivado module | Yann Herklotz | 2019-04-03 | 2 | -0/+60 |
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* | Fix to the logger | Yann Herklotz | 2019-04-03 | 5 | -14/+23 |
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* | Large refactor with passing tests | Yann Herklotz | 2019-04-02 | 7 | -0/+731 |