index
:
verismith
dev/distance
dev/reducer
develop
feature/hashmap
feature/ignored-constructs
feature/nondeterminism
feature/update-dependencies
fix/remove-DRBG
master
Verilog Fuzzer to test the major simulators and sythesisers by generating random, valid Verilog.
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path:
root
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src
/
VeriFuzz
/
Verilog.hs
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Age
Files
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*
Fix reduction for statements
Yann Herklotz
2019-05-25
1
-0
/
+2
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*
Remove modConn lens and replace by modExpr
Yann Herklotz
2019-05-15
1
-1
/
+0
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*
Add Quote export to main module
Yann Herklotz
2019-05-11
1
-0
/
+3
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*
Add constant expression to expression conversion and vice versa
Yann Herklotz
2019-05-10
1
-0
/
+2
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*
Use new fuzzing technique instead of the old function
Yann Herklotz
2019-04-17
1
-0
/
+2
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*
Move declaration of SourceInfo
Yann Herklotz
2019-04-15
1
-1
/
+2
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*
Add Bit vector instead of using numbers
Yann Herklotz
2019-04-14
1
-21
/
+1
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*
Change Port type to include lower bound
Yann Herklotz
2019-04-12
1
-5
/
+0
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*
Fix the generation of modules and add initialisation
Yann Herklotz
2019-04-10
1
-0
/
+1
|
*
Add probabilities to generation of expressions
Yann Herklotz
2019-04-09
1
-1
/
+0
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*
Add Parameter type and remove Description
Yann Herklotz
2019-04-09
1
-4
/
+0
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*
Create Arbitrary module
Yann Herklotz
2019-04-08
1
-1
/
+2
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*
Large refactor with passing tests
Yann Herklotz
2019-04-02
1
-0
/
+131
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*
More restructuring
Yann Herklotz
2019-02-01
1
-27
/
+0
|
*
Add brittany formatting instead of stylish-haskell
Yann Herklotz
2019-01-19
1
-1
/
+2
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*
Remove Arbitrary from main module
Yann Herklotz
2019-01-10
1
-2
/
+0
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*
Rename remaining modules
Yann Herklotz
2019-01-10
1
-12
/
+12
|
*
Rename files out of the module
Yann Herklotz
2019-01-10
1
-0
/
+28