| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Better formatting for if-statement | Yann Herklotz | 2019-04-04 | 1 | -2/+2 |
| * | Large refactor with passing tests | Yann Herklotz | 2019-04-02 | 1 | -0/+293 |
| * | More restructuring | Yann Herklotz | 2019-02-01 | 1 | -276/+0 |
| * | [Fix #27] Add function to Expr and add Generation type | Yann Herklotz | 2019-02-01 | 1 | -1/+17 |
| * | [Fix #22] Fix SAT solver equivalence checking | Yann Herklotz | 2019-01-20 | 1 | -1/+7 |
| * | Prettify files | Yann Herklotz | 2019-01-20 | 1 | -0/+2 |
| * | Rename moduleId to modId | Yann Herklotz | 2019-01-20 | 1 | -1/+1 |
| * | Reformat with stylish-haskell | Yann Herklotz | 2019-01-19 | 1 | -8/+6 |
| * | Add hlint changes | Yann Herklotz | 2019-01-19 | 1 | -1/+1 |
| * | Set column to 100 | Yann Herklotz | 2019-01-19 | 1 | -33/+15 |
| * | Add brittany formatting instead of stylish-haskell | Yann Herklotz | 2019-01-19 | 1 | -65/+63 |
| * | Fix all the warnings | Yann Herklotz | 2019-01-10 | 1 | -27/+25 |
| * | Fix warnings | Yann Herklotz | 2019-01-10 | 1 | -2/+2 |
| * | Fix some imports | Yann Herklotz | 2019-01-10 | 1 | -53/+14 |
| * | Rename files out of the module | Yann Herklotz | 2019-01-10 | 1 | -0/+315 |
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index : verismith | |
| Verilog Fuzzer to test the major simulators and sythesisers by generating random, valid Verilog. |
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