| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Update license notices | Yann Herklotz | 2020-01-06 | 1 | -1/+1 |
| | | |||||
| * | Update license to dual license GPLv3 | Yann Herklotz | 2020-01-06 | 1 | -1/+1 |
| | | |||||
| * | Add correct cleaning function back | Yann Herklotz | 2019-12-26 | 1 | -1/+1 |
| | | |||||
| * | Add reduction stage back | Yann Herklotz | 2019-12-26 | 1 | -0/+1 |
| | | |||||
| * | Do not run counter example if no rerunner is specified | Yann Herklotz | 2019-12-03 | 1 | -3/+4 |
| | | |||||
| * | Add extension to simulation reduction | Yann Herklotz | 2019-11-24 | 1 | -1/+1 |
| | | |||||
| * | Add output of v file during reduction | Yann Herklotz | 2019-11-24 | 1 | -13/+16 |
| | | |||||
| * | Add reduction for simulation failures | Yann Herklotz | 2019-11-12 | 1 | -5/+28 |
| | | |||||
| * | Add counter example parsing | Yann Herklotz | 2019-11-10 | 1 | -3/+3 |
| | | |||||
| * | Add reduction pass to remove constants from concat | Yann Herklotz | 2019-11-05 | 1 | -1/+19 |
| | | |||||
| * | Add data-file installation path | Yann Herklotz | 2019-10-29 | 1 | -3/+4 |
| | | | | | | This removes the need to recursively copy the data directory which will also save on space. | ||||
| * | Rename Sim to Tool | Yann Herklotz | 2019-10-18 | 1 | -2/+2 |
| | | |||||
| * | Rename main modules | Yann Herklotz | 2019-09-18 | 1 | -0/+609 |
 |
index : verismith | |
| Verilog Fuzzer to test the major simulators and sythesisers by generating random, valid Verilog. |
| aboutsummaryrefslogtreecommitdiffstats |