verismith - Verilog Fuzzer to test the major simulators and sythesisers by generating random, valid Verilog.

	Commit message (Expand)	Author	Age	Files	Lines
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*	Add reduction strategy for modules	Yann Herklotz	2019-05-09	5	-16/+166
*	Add NFData to force evaluation of config file	Yann Herklotz	2019-05-09	9	-167/+101
*	Fix unusable UNPACK	Yann Herklotz	2019-05-09	1	-1/+1
*	Add combinational and sequential logic support	Yann Herklotz	2019-05-09	3	-97/+55
*	Only show the seed	Yann Herklotz	2019-05-07	1	-3/+1
*	Add configuration options for all simulators	Yann Herklotz	2019-05-07	7	-66/+213
*	Add description field to Yosys	Yann Herklotz	2019-05-07	3	-14/+13
*	Use abc for verification	Yann Herklotz	2019-05-07	3	-8/+6
*	Create better command line output	Yann Herklotz	2019-05-07	3	-9/+16
*	Rename some functions to use nicer names	Yann Herklotz	2019-05-07	10	-55/+62
*	Add support for multiple modules	Yann Herklotz	2019-05-07	4	-11/+41
*	Fix bug in Config.hs	Yann Herklotz	2019-05-06	1	-6/+6
*	Support multiple reg assigns in if statements	Yann Herklotz	2019-05-06	6	-74/+93
*	Modify generation of statements to create more interesting ones	Yann Herklotz	2019-05-05	1	-16/+35
*	Format with brittany	Yann Herklotz	2019-05-05	6	-49/+82
*	Write config file with seed to the fuzz directory	Yann Herklotz	2019-05-05	2	-18/+21
*	Add seeds for reproducible runs	Yann Herklotz	2019-05-05	4	-44/+83
*	Add more reduction to tests	Yann Herklotz	2019-04-29	1	-2/+10
*	Add random bit selection for wires	Yann Herklotz	2019-04-26	6	-44/+89
*	Add time and date by default	Yann Herklotz	2019-04-24	1	-3/+17
*	Add documentation to Config.hs	Yann Herklotz	2019-04-23	1	-16/+128
*	Fix some errors in the templates	Yann Herklotz	2019-04-23	1	-0/+1
*	Fix XST Synthesis	Yann Herklotz	2019-04-23	1	-1/+1
*	Add simulator support to the config file	Yann Herklotz	2019-04-23	2	-179/+101
*	Formatting files and add result type to front end	Yann Herklotz	2019-04-23	5	-6/+14
*	Fix code generation for always blocks with or	Yann Herklotz	2019-04-23	1	-3/+3
*	Fine tune the generation	Yann Herklotz	2019-04-23	1	-15/+13
*	Add Report type	Yann Herklotz	2019-04-23	1	-0/+169
*	Add event list generation for always blocks	Yann Herklotz	2019-04-23	3	-73/+4
*	Add support for more event lists	Yann Herklotz	2019-04-21	4	-11/+74
*	Add new modules to fix Quartus equivalence check	Yann Herklotz	2019-04-21	1	-0/+1
*	Add helper functions to execute fuzzing multiple times	Yann Herklotz	2019-04-19	1	-9/+24
*	Fix compiling on CI	Yann Herklotz	2019-04-19	1	-0/+3
*	Fix some suggestions in Result.hs	Yann Herklotz	2019-04-19	1	-5/+2
*	Equivalence test now running	Yann Herklotz	2019-04-19	1	-2/+1
*	Extend ResultT and Result with more instances	Yann Herklotz	2019-04-19	2	-9/+46
*	Add output information to Type	Yann Herklotz	2019-04-18	7	-80/+95
*	Add output path to each simulator	Yann Herklotz	2019-04-18	6	-50/+121
*	Use new fuzzing technique instead of the old function	Yann Herklotz	2019-04-17	4	-12/+29
*	Reduce the wire size as Quartus was crashing	Yann Herklotz	2019-04-17	1	-1/+9
*	Add new Fuzzing technique, that checks simulators against each other	Yann Herklotz	2019-04-17	1	-11/+97
*	Add Show instances to simulators	Yann Herklotz	2019-04-17	5	-8/+25
*	Fix tests and remove Parser tests for now	Yann Herklotz	2019-04-17	1	-5/+5
*	Fix other type errors and replace with Result type	Yann Herklotz	2019-04-17	3	-35/+49
*	Update simulator with Result type	Yann Herklotz	2019-04-17	5	-61/+111
*	Add Fuzzer and implement it with the result type	Yann Herklotz	2019-04-17	1	-35/+26
*	Move Reduce file	Yann Herklotz	2019-04-17	1	-2/+2
*	Add Result type	Yann Herklotz	2019-04-17	1	-0/+101
*	Move declaration of SourceInfo	Yann Herklotz	2019-04-15	12	-35/+39
*	Format with brittany and add right modules	Yann Herklotz	2019-04-15	4	-18/+19