.gitignore - verismith - Verilog Fuzzer to test the major simulators and sythesisers by generating random, valid Verilog.

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path: root/.gitignore

blob: 9bc29f785bb3941065ab77036f1034c004c73c30 (plain)

# Files
TAGS
*.jou
*.log
*~
cabal.project.local

# Folders
.stack-work
.shelly
failed
output*
.ghc*
dist*
.direnv