1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
|
// Based on cyclonev_atoms.v from Quartus II 14.0.0 Build 200 06/17/2014
// ==========================================================================================
module cyclonev_lcell_comb (
dataa, datab, datac, datad, datae, dataf, datag, cin, sharein,
combout, sumout, cout, shareout
);
input dataa, datab, datac, datad, datae, dataf, datag, cin, sharein;
output reg combout, sumout, cout, shareout;
parameter lut_mask = 64'hFFFFFFFFFFFFFFFF;
parameter shared_arith = "off";
parameter extended_lut = "off";
parameter dont_touch = "off";
parameter lpm_type = "cyclonev_lcell_comb";
localparam ishared_arith = shared_arith == "on";
localparam iextended_lut = extended_lut == "on";
localparam [15:0] f0_mask = lut_mask[15:0];
localparam [15:0] f1_mask = lut_mask[31:16];
localparam [15:0] f2_mask = lut_mask[47:32];
localparam [15:0] f3_mask = lut_mask[63:48];
reg f0_out, f1_out, f2_out, f3_out;
reg g0_out, g1_out;
reg f2_input3, f2_f;
reg adder_input2;
// 4-input LUT function
function lut4;
input [15:0] mask;
input dataa;
input datab;
input datac;
input datad;
begin
lut4 = datad ? ( datac ? ( datab ? ( dataa ? mask[15] : mask[14])
: ( dataa ? mask[13] : mask[12]))
: ( datab ? ( dataa ? mask[11] : mask[10])
: ( dataa ? mask[ 9] : mask[ 8])))
: ( datac ? ( datab ? ( dataa ? mask[ 7] : mask[ 6])
: ( dataa ? mask[ 5] : mask[ 4]))
: ( datab ? ( dataa ? mask[ 3] : mask[ 2])
: ( dataa ? mask[ 1] : mask[ 0])));
end
endfunction
// 5-input LUT function
function lut5;
input [31:0] mask;
input dataa;
input datab;
input datac;
input datad;
input datae;
reg e0_lut;
reg e1_lut;
reg [15:0] e0_mask;
reg [31:16] e1_mask;
begin
e0_mask = mask[15:0];
e1_mask = mask[31:16];
begin
e0_lut = lut4(e0_mask, dataa, datab, datac, datad);
e1_lut = lut4(e1_mask, dataa, datab, datac, datad);
if (datae === 1'bX) // X propogation
begin
if (e0_lut == e1_lut)
begin
lut5 = e0_lut;
end
else
begin
lut5 = 1'bX;
end
end
else
begin
lut5 = (datae == 1'b1) ? e1_lut : e0_lut;
end
end
end
endfunction
// 6-input LUT function
function lut6;
input [63:0] mask;
input dataa;
input datab;
input datac;
input datad;
input datae;
input dataf;
reg f0_lut;
reg f1_lut;
reg [31:0] f0_mask;
reg [63:32] f1_mask ;
begin
f0_mask = mask[31:0];
f1_mask = mask[63:32];
begin
lut6 = mask[{dataf, datae, datad, datac, datab, dataa}];
if (lut6 === 1'bX)
begin
f0_lut = lut5(f0_mask, dataa, datab, datac, datad, datae);
f1_lut = lut5(f1_mask, dataa, datab, datac, datad, datae);
if (dataf === 1'bX) // X propogation
begin
if (f0_lut == f1_lut)
begin
lut6 = f0_lut;
end
else
begin
lut6 = 1'bX;
end
end
else
begin
lut6 = (dataf == 1'b1) ? f1_lut : f0_lut;
end
end
end
end
endfunction
always @(datag or dataf or datae or datad or datac or
datab or dataa or cin or sharein)
begin
// check for extended LUT mode
if (iextended_lut == 1)
f2_input3 = datag;
else
f2_input3 = datac;
f0_out = lut4(f0_mask, dataa, datab, datac, datad);
f1_out = lut4(f1_mask, dataa, datab, f2_input3, datad);
f2_out = lut4(f2_mask, dataa, datab, datac, datad);
f3_out = lut4(f3_mask, dataa, datab, f2_input3, datad);
// combout is the 6-input LUT
if (iextended_lut == 1)
begin
if (datae == 1'b0)
begin
g0_out = f0_out;
g1_out = f2_out;
end
else if (datae == 1'b1)
begin
g0_out = f1_out;
g1_out = f3_out;
end
else
begin
if (f0_out == f1_out)
g0_out = f0_out;
else
g0_out = 1'bX;
if (f2_out == f3_out)
g1_out = f2_out;
else
g1_out = 1'bX;
end
if (dataf == 1'b0)
combout = g0_out;
else if ((dataf == 1'b1) || (g0_out == g1_out))
combout = g1_out;
else
combout = 1'bX;
end
else
combout = lut6(lut_mask, dataa, datab, datac, datad, datae, dataf);
// check for shareed arithmetic mode
if (ishared_arith == 1)
adder_input2 = sharein;
else
begin
f2_f = lut4(f2_mask, dataa, datab, datac, dataf);
adder_input2 = !f2_f;
end
// sumout & cout
sumout = cin ^ f0_out ^ adder_input2;
cout = (cin & f0_out) | (cin & adder_input2) | (f0_out & adder_input2);
shareout = f2_out;
end
endmodule
// ==========================================================================================
module cyclonev_io_ibuf (i, ibar, dynamicterminationcontrol, o);
parameter differential_mode = 0;
parameter bus_hold = 0;
parameter simulate_z_as = 0;
parameter lpm_type = 0;
input i;
input ibar;
input dynamicterminationcontrol;
output o;
assign o = i;
endmodule
// ==========================================================================================
module cyclonev_io_obuf (i, oe, dynamicterminationcontrol, seriesterminationcontrol, parallelterminationcontrol, devoe, o, obar);
parameter open_drain_output = 0;
parameter bus_hold = 0;
parameter shift_series_termination_control = 0;
parameter sim_dynamic_termination_control_is_connected = 0;
parameter lpm_type = 0;
input i;
input oe;
input devoe;
input dynamicterminationcontrol;
input [15:0] seriesterminationcontrol;
input [15:0] parallelterminationcontrol;
output o;
output obar;
assign o = i, obar = ~i;
endmodule
module dffeas (d, clk, ena, clrn, prn, aload, asdata, sclr, sload, devclrn, devpor, q );
// GLOBAL PARAMETER DECLARATION
parameter power_up = "DONT_CARE";
parameter is_wysiwyg = "false";
parameter dont_touch = "false";
parameter x_on_violation = "on";
parameter lpm_type = "dffeas";
input d;
input clk;
input ena;
input clrn;
input prn;
input aload;
input asdata;
input sclr;
input sload;
input devclrn;
input devpor;
output reg q;
always @(posedge clk) begin
q <= d;
end
endmodule
module cyclonev_clkena (
inclk,
ena,
enaout,
outclk);
// leda G_521_3_B off
parameter clock_type = "auto";
parameter ena_register_mode = "always enabled";
parameter lpm_type = "cyclonev_clkena";
parameter ena_register_power_up = "high";
parameter disable_mode = "low";
parameter test_syn = "high";
// leda G_521_3_B on
input inclk;
input ena;
output enaout;
output outclk;
assign outclk = ena ? inclk : 1'b0;
assign enaout = ena;
endmodule //cyclonev_clkena
|
