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author | David Thomas <d.thomas1@imperial.ac.uk> | 2014-10-17 14:55:11 +0100 |
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committer | David Thomas <d.thomas1@imperial.ac.uk> | 2014-10-17 14:55:11 +0100 |
commit | 447c83d9c80a119922c9397e9a196b93e5d068c0 (patch) | |
tree | c05263597a49f066ebab74a78679514bb5dc2223 | |
parent | 39288a6d59759b1a57ba00b845a01c7973f37c09 (diff) | |
download | MipsCPU-447c83d9c80a119922c9397e9a196b93e5d068c0.tar.gz MipsCPU-447c83d9c80a119922c9397e9a196b93e5d068c0.zip |
Fixed #1 : Documentation implied the table was complete (minus SYSCALL), but it is not.
-rw-r--r-- | README.md | 5 |
1 files changed, 5 insertions, 0 deletions
@@ -277,6 +277,11 @@ XOR | Bitwise exclusive or | 1 X | XORI | Bitwise exclusive or immediate | 2 XX | ------------------------------------------------------------------ +This is not quite an exhaustive list of MIPS-1 instructions +(as was originally sort of implied). Some were deliberately left out +for teaching purposes, while others are not as important and tend +to penalise people for making the same mistakes in multiple places. + There are many instructions, but there is a lot of commonality between some instructions. Think about the underlying digital data-path in a real processor, and use that to identify |