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author | David Thomas <d.thomas1@imperial.ac.uk> | 2014-10-17 15:10:00 +0100 |
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committer | David Thomas <d.thomas1@imperial.ac.uk> | 2014-10-17 15:10:00 +0100 |
commit | 4bdf3a0358f24ab7d83801090fbc05adc1dacd75 (patch) | |
tree | 81665b7d759dd641ebe82254d3fa0c8a9c1bf26a | |
parent | 82c56da53807fcd2c06ee2ffa88fbe7b5a8f3811 (diff) | |
download | MipsCPU-4bdf3a0358f24ab7d83801090fbc05adc1dacd75.tar.gz MipsCPU-4bdf3a0358f24ab7d83801090fbc05adc1dacd75.zip |
Let's try that again.
-rw-r--r-- | README.md | 1 |
1 files changed, 0 insertions, 1 deletions
@@ -275,7 +275,6 @@ SUBU | Subtract unsigned | 1 X | SW | Store word | 2 XX | XOR | Bitwise exclusive or | 1 X | XORI | Bitwise exclusive or immediate | 2 XX | ------------------------------------------------------------------ This is not quite an exhaustive list of MIPS-1 instructions (as was originally sort of implied). Some were deliberately left out |