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author | m8pple <dt10@imperial.ac.uk> | 2014-10-21 10:11:04 +0100 |
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committer | m8pple <dt10@imperial.ac.uk> | 2014-10-21 10:11:04 +0100 |
commit | a73aed0790d6f56cbf70bd1453cdd77a38d1c3cc (patch) | |
tree | c45599aebe15b079a88e42307a4248efa283be4e | |
parent | c13c865f5cc6902e6624d63ac89cc5d37b817d7b (diff) | |
download | MipsCPU-a73aed0790d6f56cbf70bd1453cdd77a38d1c3cc.tar.gz MipsCPU-a73aed0790d6f56cbf70bd1453cdd77a38d1c3cc.zip |
Fixed #8 : Added the documentation for mips_cpu_get_pc (oversight on my part).
I didn't add constraints on the pointer validity, as they are covered
under a more common sense argument. There is no reasonable interpretation
for passing a null or invalid pointer for pc, as it cannot give the
caller any more information than they already have.
-rw-r--r-- | include/mips_cpu.h | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/include/mips_cpu.h b/include/mips_cpu.h index 117d869..8af9827 100644 --- a/include/mips_cpu.h +++ b/include/mips_cpu.h @@ -77,8 +77,14 @@ mips_error mips_cpu_set_pc( uint32_t pc //!< Address of the next instruction to exectute. ); -/*! Gets the pc for the next instruction. */ -mips_error mips_cpu_get_pc(mips_cpu_h state, uint32_t *pc); +/*! Gets the pc for the next instruction. + + Returns the program counter for the next instruction to be executed. +*/ +mips_error mips_cpu_get_pc( + mips_cpu_h state, //!< Valid (non-empty) handle to a CPU + uint32_t *pc //!< Where to write the byte address too +); /*! Advances the processor by one instruction. |