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authorDavid Thomas <m8pple@github.com>2016-10-10 06:27:37 +0100
committerDavid Thomas <m8pple@github.com>2016-10-10 06:27:37 +0100
commit0673cc3651b60203b90eccdc1c5af5e455f4b6fb (patch)
tree6c50f8b4387ebda2c647b8e7bd66d60884d1e557 /include/mips_core.h
parent969874832d55c00c1c5874ef5ae1fdb82b3ded83 (diff)
downloadMipsCPU-0673cc3651b60203b90eccdc1c5af5e455f4b6fb.tar.gz
MipsCPU-0673cc3651b60203b90eccdc1c5af5e455f4b6fb.zip
Updated for 2016.
Diffstat (limited to 'include/mips_core.h')
-rw-r--r--include/mips_core.h13
1 files changed, 7 insertions, 6 deletions
diff --git a/include/mips_core.h b/include/mips_core.h
index 0733333..a59057b 100644
--- a/include/mips_core.h
+++ b/include/mips_core.h
@@ -10,7 +10,7 @@
matching the internal types of a processor, and for managing
conversions from signed to unsigned types. The C/C++ standard has certain
(very strict) rules for conversion between types, which are different from
- the rules of any particular CPU. In an extremely legalitic interpretation, the
+ the rules of any particular CPU. In an extremely legalistic interpretation, the
integer encoding is not necessarily twos complement, but we
will mandate that all target architectures use a twos complement
representation.
@@ -46,11 +46,12 @@ typedef enum _mips_error{
//! Error or exception from the simulated processor or program.
///@{
mips_ExceptionBreak=0x2000,
- mips_ExceptionInvalidAddress=0x2001,
- mips_ExceptionInvalidAlignment=0x2002,
- mips_ExceptionAccessViolation=0x2003,
- mips_ExceptionInvalidInstruction=0x2004,
- mips_ExceptionArithmeticOverflow=0x2005,
+ mips_ExceptionInvalidLength=0x2001,
+ mips_ExceptionInvalidAddress=0x2002,
+ mips_ExceptionInvalidAlignment=0x2003,
+ mips_ExceptionAccessViolation=0x2004,
+ mips_ExceptionInvalidInstruction=0x2005,
+ mips_ExceptionArithmeticOverflow=0x2006,
///@}
/*! This is an extension point for implementations. Codes