adding more instructions to the test cases and the cpu

1 files changed, 16 insertions, 4 deletions

diff --git a/src/ymh15/mips_cpu_ymh15.hpp b/src/ymh15/mips_cpu_ymh15.hpp
index 1e2900a..2a95db1 100644
--- a/src/ymh15/mips_cpu_ymh15.hpp
+++ b/src/ymh15/mips_cpu_ymh15.hpp
@@ -1,8 +1,11 @@
 #ifndef MIPS_CPU_YMH15_H
 #define MIPS_CPU_YMH15_H
 
+#include <cstdio>
+
 #include "../../include/mips.h"
 
+// defines the location of the things in the array var
 #define OPCODE 0
 #define REG_S 1
 #define REG_T 2
@@ -12,15 +15,24 @@
 #define IMM 6
 #define MEM 7
 
-mips_error read_instruction(mips_cpu_h state);
+// executes an instruction by first decoding it and sending the right
+// variables to the different functions to be correctly interpreted
 mips_error exec_instruction(mips_cpu_h state, uint32_t inst);
 mips_error exec_R(mips_cpu_h state, uint32_t var[8]);
 mips_error exec_J(mips_cpu_h state, uint32_t var[8]);
 mips_error exec_I(mips_cpu_h state, uint32_t var[8]);
 
-mips_error add_sub(mips_cpu_h state, uint32_t var[8], int32_t add_sub);
-mips_error bitwise(mips_cpu_h state, uint32_t var[8]);
+// performs addition and subtraction
+mips_error add_sub(mips_cpu_h state, uint32_t var[8], int32_t add_sub,
+                   int32_t imm);
+// performs bitwise operations
+mips_error bitwise(mips_cpu_h state, uint32_t var[8], unsigned imm);
+
+mips_error branch(mips_cpu_h state, uint32_t var[8]);
+
+mips_error jump(mips_cpu_h state, uint32_t var[8], uint8_t link);
 
-uint8_t get_msb(uint32_t word);
+mips_error load(mips_cpu_h state, uint32_t var[8]);
+mips_error store(mips_cpu_h state, uint32_t var[8]);
 
 #endif // MIPS_CPU_YMH15_H