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| author | Xavier Leroy <xavier.leroy@college-de-france.fr> | 2020-07-25 18:27:04 +0200 |
|---|---|---|
| committer | Xavier Leroy <xavierleroy@users.noreply.github.com> | 2020-07-27 16:30:28 +0200 |
| commit | a56e0c65b08f0f7123630f3a1b415e67ef48c38e (patch) | |
| tree | f357435bd2681bb473e294e678f5b060ee8c6ccf /aarch64/Asm.v | |
| parent | 094ac30cfbc757dd633191513c05b0738993651d (diff) | |
| download | compcert-kvx-a56e0c65b08f0f7123630f3a1b415e67ef48c38e.tar.gz compcert-kvx-a56e0c65b08f0f7123630f3a1b415e67ef48c38e.zip | |
AArch64 implementation of __builtin_ctz*
Using the "rbit" instruction (reverse bits).
Diffstat (limited to 'aarch64/Asm.v')
| -rw-r--r-- | aarch64/Asm.v | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/aarch64/Asm.v b/aarch64/Asm.v index 47cd3051..79232783 100644 --- a/aarch64/Asm.v +++ b/aarch64/Asm.v @@ -237,6 +237,7 @@ Inductive instruction: Type := | Pclz (sz: isize) (rd r1: ireg) (**r count leading zero bits *) | Prev (sz: isize) (rd r1: ireg) (**r reverse bytes *) | Prev16 (sz: isize) (rd r1: ireg) (**r reverse bytes in each 16-bit word *) + | Prbit (sz: isize) (rd r1: ireg) (**r reverse bits *) (** Conditional data processing *) | Pcsel (rd: ireg) (r1 r2: ireg) (c: testcond) (**r int conditional move *) | Pcset (rd: ireg) (c: testcond) (**r set to 1/0 if cond is true/false *) @@ -1107,6 +1108,7 @@ Definition exec_instr (f: function) (i: instruction) (rs: regset) (m: mem) : out | Pclz _ _ _ | Prev _ _ _ | Prev16 _ _ _ + | Prbit _ _ _ | Pfsqrt _ _ _ | Pfmadd _ _ _ _ _ | Pfmsub _ _ _ _ _ |