prefix all calls to OpWeights as preparation to using a structure

1 files changed, 14 insertions, 14 deletions

diff --git a/aarch64/PrepassSchedulingOracle.ml b/aarch64/PrepassSchedulingOracle.ml
index 25083bcd..63fdec17 100644
--- a/aarch64/PrepassSchedulingOracle.ml
+++ b/aarch64/PrepassSchedulingOracle.ml
@@ -2,7 +2,6 @@ open AST
 open RTL
 open Maps
 open InstructionScheduler
-open OpWeights
 open Registers
 
 let use_alias_analysis () = false
@@ -26,7 +25,7 @@ let get_simple_dependencies (seqa : (instruction*Regset.t) array) =
   and last_mem_write : int option ref = ref None
   and last_branch : int option ref = ref None
   and last_non_pipelined_op : int array = Array.make
-                                        nr_non_pipelined_units ( -1 )
+                                        OpWeights.nr_non_pipelined_units ( -1 )
   and latency_constraints : latency_constraint list ref = ref [] in
   let add_constraint instr_from instr_to latency =
     assert (instr_from <= instr_to);
@@ -142,15 +141,15 @@ let get_simple_dependencies (seqa : (instruction*Regset.t) array) =
       | Inop _ -> ()
       | Iop(op, inputs, output, _) ->
          add_non_pipelined_resources i
-           (non_pipelined_resources_of_op op (List.length inputs));
+           (OpWeights.non_pipelined_resources_of_op op (List.length inputs));
          (if Op.is_trapping_op op then irreversible_action i);
          add_input_regs i inputs;
-         add_output_reg i (latency_of_op op (List.length inputs)) output
+         add_output_reg i (OpWeights.latency_of_op op (List.length inputs)) output
       | Iload(trap, chunk, addressing, addr_regs, output, _) ->
          (if trap=TRAP then irreversible_action i);
          add_input_mem i;
          add_input_regs i addr_regs;
-         add_output_reg i (latency_of_load trap chunk addressing (List.length addr_regs)) output
+         add_output_reg i (OpWeights.latency_of_load trap chunk addressing (List.length addr_regs)) output
       | Istore(chunk, addressing, addr_regs, input, _) ->
          irreversible_action i;
          add_input_regs i addr_regs;
@@ -164,7 +163,7 @@ let get_simple_dependencies (seqa : (instruction*Regset.t) array) =
          );
          add_input_mem i;
          add_input_regs i inputs;
-         add_output_reg i (latency_of_call signature ef) output;
+         add_output_reg i (OpWeights.latency_of_call signature ef) output;
          add_output_mem i;
          failwith "Icall"
       | Itailcall(signature, ef, inputs) ->
@@ -202,19 +201,20 @@ let get_simple_dependencies (seqa : (instruction*Regset.t) array) =
   !latency_constraints;;
 
 let resources_of_instruction = function
-  | Inop _ -> Array.map (fun _ -> 0) resource_bounds
-  | Iop(op, inputs, output, _) -> resources_of_op op (List.length inputs)
+  | Inop _ -> Array.map (fun _ -> 0) OpWeights.resource_bounds
+  | Iop(op, inputs, output, _) ->
+     OpWeights.resources_of_op op (List.length inputs)
   | Iload(trap, chunk, addressing, addr_regs, output, _) ->
-     resources_of_load trap chunk addressing (List.length addr_regs)
+     OpWeights.resources_of_load trap chunk addressing (List.length addr_regs)
   | Istore(chunk, addressing, addr_regs, input, _) ->
-     resources_of_store chunk addressing (List.length addr_regs)
+     OpWeights.resources_of_store chunk addressing (List.length addr_regs)
   | Icall(signature, ef, inputs, output, _) ->
-     resources_of_call signature ef
+     OpWeights.resources_of_call signature ef
   | Ibuiltin(ef, builtin_inputs, builtin_output, _) ->
-     resources_of_builtin ef
+     OpWeights.resources_of_builtin ef
   | Icond(cond, args, _, _ , _) ->
-     resources_of_cond cond (List.length args)
-  | Itailcall _ | Ijumptable _ | Ireturn _ -> resource_bounds
+     OpWeights.resources_of_cond cond (List.length args)
+  | Itailcall _ | Ijumptable _ | Ireturn _ -> OpWeights.resource_bounds
     
 let print_sequence pp (seqa : instruction array) =
   Array.iteri (