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authorLéo Gourdin <leo.gourdin@univ-grenoble-alpes.fr>2020-11-30 11:18:33 +0100
committerLéo Gourdin <leo.gourdin@univ-grenoble-alpes.fr>2020-11-30 11:18:33 +0100
commit019374836c506b0275757d496381d8516dc0213a (patch)
tree3a5d78c77de46dd03e0acf5dcfc4271c7c5a3ac8 /aarch64
parentf1fb14db44180ef2d74a95f49c42fbed0694e9e8 (diff)
downloadcompcert-kvx-019374836c506b0275757d496381d8516dc0213a.tar.gz
compcert-kvx-019374836c506b0275757d496381d8516dc0213a.zip
Changing weights system at asmblock level instead of asm
Diffstat (limited to 'aarch64')
-rw-r--r--aarch64/OpWeightsAsm.ml380
-rw-r--r--aarch64/PostpassSchedulingOracle.ml311
2 files changed, 154 insertions, 537 deletions
diff --git a/aarch64/OpWeightsAsm.ml b/aarch64/OpWeightsAsm.ml
index c1d0583a..ca120228 100644
--- a/aarch64/OpWeightsAsm.ml
+++ b/aarch64/OpWeightsAsm.ml
@@ -11,109 +11,17 @@
(* *)
(* *************************************************************)
+open Asmblock
+
(*type called_function = (Registers.reg, AST.ident) Datatypes.sum*)
-type real_instruction =
- | Add
- | Adr
- | Adrp
- | And
- | Asr
- | B
- | Bic
- | Bl
- | Blr
- | Br
- | Cbnz
- | Cbz
- | Cls
- | Clz
- | Cmn
- | Cmp
- | Csel
- | Cset
- | Eon
- | Eor
- | Fabs
- | Fadd
- | Fcmp
- | Fcsel
- | Fcvt
- | Fcvtzs
- | Fcvtzu
- | Fdiv
- | Fmadd
- | Fmov
- | Fmsub
- | Fmul
- | Fnmadd
- | Fnmul
- | Fnmsub
- | Fneg
- | Fsqrt
- | Fsub
- | Ldaxr
- | Ldp
- | Ldr
- | Ldrb
- | Ldrh
- | Ldrsb
- | Ldrsh
- | Ldrsw
- | Lr
- | Lsl
- | Lsr
- | Madd
- | Mov
- | Movk
- | Movn
- | Movz
- | Msub
- | Nop
- | Orn
- | Orr
- | Ret
- | Rev
- | Rev16
- | Ror
- | Sbfiz
- | Sbfx
- | Scvtf
- | Sdiv
- | Smulh
- | Stlxr
- | Stp
- | Str
- | Strb
- | Strh
- | Sub
- | Sxtb
- | Sxth
- | Sxtw
- | Tbnz
- | Tbz
- | Tst
- | Ubfiz
- | Ubfx
- | Ucvtf
- | Udiv
- | Umulh
- | Uxtb
- | Uxth
- | Uxtw
- | Uxtx
- (* Pseudo instr *)
- | Btbl
- | Allocframe
- | Freeframe
- | Builtin
- | Cvtx2w
+type instruction = PBasic of Asmblock.basic | PControl of Asmblock.control
type opweights = {
pipelined_resource_bounds : int array;
nr_non_pipelined_units : int;
- latency_of_op : real_instruction -> int -> int;
- resources_of_op : real_instruction -> int -> int array;
+ latency_of_op : instruction -> int -> int;
+ resources_of_op : instruction -> int -> int array;
(*non_pipelined_resources_of_op : Op.operation -> int -> int array;*)
(*latency_of_load : AST.trapping_mode -> AST.memory_chunk -> Op.addressing -> int -> int;*)
(*resources_of_load : AST.trapping_mode -> AST.memory_chunk -> Op.addressing -> int -> int array;*)
@@ -130,197 +38,86 @@ module Cortex_A53 = struct
(* instr ; ALU ; MAC; LSU *)
let nr_non_pipelined_units = 1
- let latency_of_op (i : real_instruction) (nargs : int) =
+ let latency_of_op (i : instruction) (nargs : int) =
match i with
- | Add -> 1
- | Adr -> 1
- | Adrp -> 1 (* XXX *)
- | And -> 1
- | Asr -> 2
- | B -> 1
- | Bic -> 1
- | Bl -> 1
- | Blr -> 1
- | Br -> 1
- | Cbnz -> 1
- | Cbz -> 1
- | Cls -> 1
- | Clz -> 1
- | Cmn -> 6
- | Cmp -> 6
- | Csel -> 2
- | Cset -> 2
- | Eon -> 1
- | Eor -> 1
- | Fabs -> 6
- | Fadd -> 1
- | Fcmp -> 6
- | Fcsel -> 1
- | Fcvt -> 6
- | Fcvtzs -> 6
- | Fcvtzu -> 6
- | Fdiv -> 50
- | Fmadd -> 1
- | Fmov -> 1
- | Fmsub -> 1
- | Fmul -> 6
- | Fnmadd -> 1
- | Fnmul -> 1
- | Fnmsub -> 1
- | Fneg -> 6
- | Fsqrt -> 1
- | Fsub -> 6
- | Ldaxr -> 3
- | Ldp -> 3
- | Ldr -> 3
- | Ldrb -> 3
- | Ldrh -> 3
- | Ldrsb -> 3
- | Ldrsh -> 3
- | Ldrsw -> 3
- | Lr -> 3
- | Lsl -> 2
- | Lsr -> 2
- | Madd -> 4
- | Mov -> 1 (* XXX *)
- | Movk -> 1
- | Movn -> 1
- | Movz -> 1
- | Msub -> 4
- | Nop -> 1
- | Orn -> 1
- | Orr -> 1
- | Ret -> 1
- | Rev -> 1
- | Rev16 -> 1
- | Ror -> 2
- | Sbfiz -> 2 (* XXX *)
- | Sbfx -> 2
- | Scvtf -> 6
- | Sdiv -> 50
- | Smulh -> 4
- | Stlxr -> 2
- | Stp -> 2
- | Str -> 2
- | Strb -> 2
- | Strh -> 2
- | Sub -> 1
- | Sxtb -> 1
- | Sxth -> 1
- | Sxtw -> 1
- | Tbnz -> 1
- | Tbz -> 1
- | Tst -> 6
- | Ubfiz -> 2 (* XXX *)
- | Ubfx -> 2
- | Ucvtf -> 6
- | Udiv -> 50
- | Umulh -> 4
- | Uxtb -> 1
- | Uxth -> 1
- | Uxtw -> 1
- | Uxtx -> 1
- | Btbl -> 1
- | Allocframe -> 51
- | Freeframe -> 51
- | Builtin -> 51
- | Cvtx2w -> 51
-
- let resources_of_op (i : real_instruction) (nargs : int) =
+ | PBasic (PArith (PArithP (_, _))) -> 1
+ | PBasic (PArith (PArithPP (i', _, _))) -> (
+ match i' with
+ | Psbfiz (_, _, _) | Psbfx (_, _, _) | Pubfiz (_, _, _) | Pubfx (_, _, _)
+ ->
+ 2
+ | Pfcvtds | Pfcvtsd
+ | Pfcvtzs (_, _)
+ | Pfcvtzu (_, _)
+ | Pfabs _ | Pfneg _
+ | Pscvtf (_, _)
+ | Pucvtf (_, _) ->
+ 6
+ | _ -> 1)
+ | PBasic (PArith (PArithPPP (i', _, _, _))) -> (
+ match i' with
+ | Pasrv _ | Plslv _ | Plsrv _ | Prorv _ | Paddext _ | Psubext _ -> 2
+ | Psmulh | Pumulh -> 4
+ | Pfdiv _ | Psdiv _ | Pudiv _ -> 50
+ | _ -> 6)
+ | PBasic (PArith (PArithRR0R (_, _, _, _))) -> 2
+ | PBasic (PArith (PArithRR0 (_, _, _))) -> 1
+ | PBasic (PArith (PArithARRRR0 (_, _, _, _, _))) -> 4
+ | PBasic (PArith (PArithComparisonPP (_, _, _))) -> 6
+ | PBasic (PArith (PArithComparisonR0R (_, _, _))) -> 1
+ | PBasic (PArith (PArithComparisonP (i', _))) -> (
+ match i' with Pfcmp0 _ -> 6 | _ -> 1)
+ | PBasic (PArith (Pcset (_, _))) | PBasic (PArith (Pcsel (_, _, _, _))) -> 6
+ | PBasic (PArith _) -> 1
+ | PBasic (PLoad (_, _, _)) -> 3
+ | PBasic (PStore (_, _, _)) -> 3
+ | PBasic (Pallocframe (_, _)) -> 3
+ | PBasic (Pfreeframe (_, _)) -> 1
+ | PBasic (Ploadsymbol (_, _)) -> 1
+ | PBasic (Pcvtsw2x (_, _)) -> 2
+ | PBasic (Pcvtuw2x (_, _)) -> 2
+ | PBasic (Pcvtx2w _) -> 1
+ | PControl _ -> 6
+
+ let resources_of_op (i : instruction) (nargs : int) =
match i with
- | Add -> [| 1; 1; 0; 0 |]
- | Adr -> [| 1; 1; 0; 0 |]
- | Adrp -> [| 1; 1; 0; 0 |]
- | And -> [| 1; 1; 0; 0 |]
- | Asr -> [| 1; 1; 0; 0 |]
- | B -> [| 1; 1; 0; 0 |]
- | Bic -> [| 1; 1; 0; 0 |]
- | Bl -> [| 1; 1; 0; 0 |]
- | Blr -> [| 1; 1; 0; 0 |]
- | Br -> [| 1; 1; 0; 0 |]
- | Cbnz -> [| 1; 1; 0; 0 |]
- | Cbz -> [| 1; 1; 0; 0 |]
- | Cls -> [| 1; 1; 0; 0 |]
- | Clz -> [| 1; 1; 0; 0 |]
- | Cmn -> [| 1; 1; 1; 0 |]
- | Cmp -> [| 1; 1; 1; 0 |]
- | Csel -> [| 1; 1; 1; 0 |]
- | Cset -> [| 1; 1; 1; 0 |]
- | Eon -> [| 1; 1; 0; 0 |]
- | Eor -> [| 1; 1; 0; 0 |]
- | Fabs -> [| 1; 1; 1; 0 |]
- | Fadd -> [| 1; 1; 1; 0 |]
- | Fcmp -> [| 1; 1; 1; 0 |]
- | Fcsel -> [| 1; 1; 0; 0 |]
- | Fcvt -> [| 1; 1; 1; 0 |]
- | Fcvtzs -> [| 1; 1; 1; 0 |]
- | Fcvtzu -> [| 1; 1; 1; 0 |]
- | Fdiv -> [| 1; 1; 1; 0 |]
- | Fmadd -> [| 1; 1; 0; 0 |]
- | Fmov -> [| 1; 1; 0; 0 |]
- | Fmsub -> [| 1; 1; 0; 0 |]
- | Fmul -> [| 1; 1; 1; 0 |]
- | Fnmadd -> [| 1; 1; 0; 0 |]
- | Fnmul -> [| 1; 1; 0; 0 |]
- | Fnmsub -> [| 1; 1; 0; 0 |]
- | Fneg -> [| 1; 1; 1; 0 |]
- | Fsqrt -> [| 1; 1; 0; 0 |]
- | Fsub -> [| 1; 1; 1; 0 |]
- | Ldaxr -> [| 1; 0; 0; 1 |]
- | Ldp -> [| 1; 0; 0; 1 |]
- | Ldr -> [| 1; 0; 0; 1 |]
- | Ldrb -> [| 1; 0; 0; 1 |]
- | Ldrh -> [| 1; 0; 0; 1 |]
- | Ldrsb -> [| 1; 0; 0; 1 |]
- | Ldrsh -> [| 1; 0; 0; 1 |]
- | Ldrsw -> [| 1; 0; 0; 1 |]
- | Lr -> [| 1; 0; 0; 1 |]
- | Lsl -> [| 1; 1; 0; 0 |]
- | Lsr -> [| 1; 1; 0; 0 |]
- | Madd -> [| 1; 1; 1; 0 |]
- | Mov -> [| 1; 1; 0; 0 |]
- | Movk -> [| 1; 1; 0; 0 |]
- | Movn -> [| 1; 1; 0; 0 |]
- | Movz -> [| 1; 1; 0; 0 |]
- | Msub -> [| 1; 1; 1; 0 |]
- | Nop -> [| 1; 1; 0; 0 |]
- | Orn -> [| 1; 1; 0; 0 |]
- | Orr -> [| 1; 1; 0; 0 |]
- | Ret -> [| 1; 1; 0; 0 |]
- | Rev -> [| 1; 1; 0; 0 |]
- | Rev16 -> [| 1; 1; 0; 0 |]
- | Ror -> [| 1; 1; 0; 0 |]
- | Sbfiz -> [| 1; 1; 0; 0 |]
- | Sbfx -> [| 1; 1; 0; 0 |]
- | Scvtf -> [| 1; 1; 1; 0 |]
- | Sdiv -> [| 1; 0; 0; 0 |]
- | Smulh -> [| 1; 1; 0; 0 |]
- | Stlxr -> [| 1; 0; 0; 1 |]
- | Stp -> [| 1; 0; 0; 1 |]
- | Str -> [| 1; 0; 0; 1 |]
- | Strb -> [| 1; 0; 0; 1 |]
- | Strh -> [| 1; 0; 0; 1 |]
- | Sub -> [| 1; 1; 0; 0 |]
- | Sxtb -> [| 1; 1; 0; 0 |]
- | Sxth -> [| 1; 1; 0; 0 |]
- | Sxtw -> [| 1; 1; 0; 0 |]
- | Tbnz -> [| 1; 1; 0; 0 |]
- | Tbz -> [| 1; 1; 0; 0 |]
- | Tst -> [| 1; 1; 1; 0 |]
- | Ubfiz -> [| 1; 1; 0; 0 |]
- | Ubfx -> [| 1; 1; 0; 0 |]
- | Ucvtf -> [| 1; 1; 1; 0 |]
- | Udiv -> [| 1; 0; 0; 0 |]
- | Umulh -> [| 1; 1; 0; 0 |]
- | Uxtb -> [| 1; 1; 0; 0 |]
- | Uxth -> [| 1; 1; 0; 0 |]
- | Uxtw -> [| 1; 1; 0; 0 |]
- | Uxtx -> [| 1; 1; 0; 0 |]
- | Btbl -> [| 1; 1; 0; 0 |]
- | Allocframe -> [| 1; 1; 1; 1 |]
- | Freeframe -> [| 1; 1; 1; 1 |]
- | Builtin -> [| 1; 1; 1; 1 |]
- | Cvtx2w -> [| 1; 1; 1; 1 |]
+ | PBasic (PArith (PArithP (i', _))) -> (
+ match i' with
+ | Pfmovimmd _ | Pfmovimms _ -> [| 1; 1; 0; 1 |]
+ | _ -> [| 1; 1; 0; 0 |])
+ | PBasic (PArith (PArithPP (i', _, _))) -> (
+ match i' with
+ | Pfcvtds | Pfcvtsd
+ | Pfcvtzs (_, _)
+ | Pfcvtzu (_, _)
+ | Pfabs _ | Pfneg _
+ | Pscvtf (_, _)
+ | Pucvtf (_, _) ->
+ [| 1 ; 1; 1; 0 |]
+ | _ -> [| 1; 1; 0; 0 |])
+ | PBasic (PArith (PArithPPP (i', _, _, _))) -> (
+ match i' with
+ | Pasrv _ | Plslv _ | Plsrv _ | Prorv _ | Paddext _ | Psubext _ -> [| 1; 1; 0; 0 |]
+ | Pfdiv _ | Psdiv _ | Pudiv _ -> [| 1; 0; 0; 0 |]
+ | _ -> [| 1; 1; 1; 0 |])
+ | PBasic (PArith (PArithRR0R (_, _, _, _))) -> [| 1; 1; 0; 0 |]
+ | PBasic (PArith (PArithRR0 (_, _, _))) -> [| 1; 1; 0; 0 |]
+ | PBasic (PArith (PArithARRRR0 (_, _, _, _, _))) -> [| 1; 1; 1; 0 |]
+ | PBasic (PArith (PArithComparisonPP (_, _, _))) -> [| 1; 1; 1; 0 |]
+ | PBasic (PArith (PArithComparisonR0R (_, _, _))) -> [| 1; 1; 0; 0 |]
+ | PBasic (PArith (PArithComparisonP (i', _))) -> (
+ match i' with Pfcmp0 _ -> [| 1; 1; 1; 0 |] | _ -> [| 1; 1; 0; 0 |])
+ | PBasic (PArith (Pcset (_, _))) | PBasic (PArith (Pcsel (_, _, _, _))) -> [| 1; 1; 1; 0 |]
+ | PBasic (PArith _) -> [| 1; 1; 0; 0 |]
+ | PBasic (PLoad (_, _, _)) -> [| 1; 0; 0; 1 |]
+ | PBasic (PStore (_, _, _)) -> [| 1; 0; 0; 1 |]
+ | PBasic (Pallocframe (_, _)) -> [| 1; 0; 0; 1 |]
+ | PBasic (Pfreeframe (_, _)) -> [| 1; 1; 0; 0 |]
+ | PBasic (Ploadsymbol (_, _)) -> [| 1; 1; 0; 0 |]
+ | PBasic (Pcvtsw2x (_, _)) -> [| 1; 1; 0; 0 |]
+ | PBasic (Pcvtuw2x (_, _)) -> [| 1; 1; 0; 0 |]
+ | PBasic (Pcvtx2w _) -> [| 1; 1; 0; 0 |]
+ | PControl _ -> resource_bounds
(*let non_pipelined_resources_of_op (op : operation) (nargs : int) =
match op with
@@ -342,17 +139,6 @@ module Cortex_A53 = struct
[| 1; 1; 1; 0 |]
| _ -> [| 1; 1; 0; 0 |] )*)
- let latency_of_load trap chunk _ _ = 3
-
- let latency_of_call _ _ = 6
-
- let resources_of_load trap chunk addressing nargs = [| 1; 0; 0; 1 |]
-
- let resources_of_store chunk addressing nargs = [| 1; 0; 0; 1 |]
-
- let resources_of_call _ _ = resource_bounds
-
- let resources_of_builtin _ = resource_bounds
end
let get_opweights () : opweights =
diff --git a/aarch64/PostpassSchedulingOracle.ml b/aarch64/PostpassSchedulingOracle.ml
index 9263babc..fbcdb55d 100644
--- a/aarch64/PostpassSchedulingOracle.ml
+++ b/aarch64/PostpassSchedulingOracle.ml
@@ -23,12 +23,10 @@ let debug = false
* Extracting infos from Asm instructions
*)
-type instruction = PBasic of basic | PControl of control
-
type location = Reg of Asm.preg | Mem | IREG0_XZR
type ab_inst_rec = {
- inst : real_instruction;
+ inst : instruction;
write_locs : location list;
read_locs : location list;
is_control : bool;
@@ -38,173 +36,6 @@ type ab_inst_rec = {
exception OpaqueInstruction
-let arith_p_real = function
- | Padrp (_, _) -> Adrp
- | Pmovz (_, _, _) -> Movz
- | Pmovn (_, _, _) -> Movn
- | Pfmovimms _ ->
- Fmov
- (* XXX We could also use load, but Fmov may be more convenient for tuning *)
- | Pfmovimmd _ -> Fmov
-
-let arith_pp_real = function
- | Pmov -> Mov
- | Pmovk (_, _, _) -> Movk
- | Paddadr (_, _) -> Add
- | Psbfiz (_, _, _) -> Sbfiz
- | Psbfx (_, _, _) -> Sbfx
- | Pubfiz (_, _, _) -> Ubfiz
- | Pubfx (_, _, _) -> Ubfx
- | Pfmov -> Fmov
- | Pfcvtds -> Fcvt
- | Pfcvtsd -> Fcvt
- | Pfabs _ -> Fabs
- | Pfneg _ -> Fneg
- | Pscvtf (_, _) -> Scvtf
- | Pucvtf (_, _) -> Ucvtf
- | Pfcvtzs (_, _) -> Fcvtzs
- | Pfcvtzu (_, _) -> Fcvtzu
- | Paddimm (_, _) -> Add
- | Psubimm (_, _) -> Sub
-
-let arith_ppp_real = function
- | Pasrv _ -> Asr
- | Plslv _ -> Lsl
- | Plsrv _ -> Lsr
- | Prorv _ -> Ror
- | Psmulh -> Smulh
- | Pumulh -> Umulh
- | Psdiv _ -> Sdiv
- | Pudiv _ -> Udiv
- | Paddext _ -> Add
- | Psubext _ -> Sub
- | Pfadd _ -> Fadd
- | Pfdiv _ -> Fdiv
- | Pfmul _ -> Fmul
- | Pfsub _ -> Fsub
-
-let arith_rr0r_real = function
- | Padd (_, _) -> Add
- | Psub (_, _) -> Sub
- | Pand (_, _) -> And
- | Pbic (_, _) -> Bic
- | Peon (_, _) -> Eon
- | Peor (_, _) -> Eor
- | Porr (_, _) -> Orr
- | Porn (_, _) -> Orn
-
-let arith_rr0_real = function
- | Pandimm (_, _) -> And
- | Peorimm (_, _) -> Eor
- | Porrimm (_, _) -> Orr
-
-let arith_arrrr0_real = function Pmadd _ -> Madd | Pmsub _ -> Msub
-
-let arith_comparison_p_real = function
- | Pfcmp0 _ -> Fcmp
- | Pcmpimm (_, _) -> Cmp
- | Pcmnimm (_, _) -> Cmn
- | Ptstimm (_, _) -> Tst
-
-let arith_comparison_pp_real = function
- | Pcmpext _ -> Cmp
- | Pcmnext _ -> Cmn
- | Pfcmp _ -> Fcmp
-
-let arith_comparison_r0r_real = function
- | Pcmp (_, _) -> Cmp
- | Pcmn (_, _) -> Cmn
- | Ptst (_, _) -> Tst
-
-let arith_comparison_rr0r_real = function
- | Padd (_, _) -> Add
- | Psub (_, _) -> Sub
- | Pand (_, _) -> And
- | Pbic (_, _) -> Bic
- | Peon (_, _) -> Eon
- | Peor (_, _) -> Eor
- | Porr (_, _) -> Orr
- | Porn (_, _) -> Orn
-
-let arith_comparison_rr0_real = function
- | Pandimm (_, _) -> And
- | Peorimm (_, _) -> Eor
- | Porrimm (_, _) -> Orr
-
-let arith_comparison_arrrr0_real = function Pmadd _ -> Madd | Pmsub _ -> Msub
-
-let store_rs_a_real = function
- | Pstrw -> Str
- | Pstrw_a -> Str
- | Pstrx -> Str
- | Pstrx_a -> Str
- | Pstrb -> Strb
- | Pstrh -> Strh
- | Pstrs -> Str
- | Pstrd -> Str
- | Pstrd_a -> Str
-
-let load_rd_a_real = function
- | Pldrw -> Ldr
- | Pldrw_a -> Ldr
- | Pldrx -> Ldr
- | Pldrx_a -> Ldr
- | Pldrb _ -> Ldrb
- | Pldrsb _ -> Ldrsb
- | Pldrh _ -> Ldrh
- | Pldrsh _ -> Ldrsh
- | Pldrzw -> Ldr
- | Pldrsw -> Ldrsw
- | Pldrs -> Ldr
- | Pldrd -> Ldr
- | Pldrd_a -> Ldr
-
-let loadsymbol_real = Ldr
-
-let cvtsw2x_real = Sxtw
-
-let cvtuw2x_real = Uxtw
-
-let cset_real = Cset
-
-let csel_real = Csel
-
-let fmovi_real = Fmov
-
-let fnmul_real = Fnmul
-
-let b_real = B
-
-let bc_real = B
-
-let bl_real = Bl
-
-let bs_real = B
-
-let blr_real = Blr
-
-let br_real = Br
-
-let ret_real = Ret
-
-let cbnz_real = Cbnz
-
-let cbz_real = Cbz
-
-let tbnz_real = Tbnz
-
-let tbz_real = Tbz
-
-let btbl_real = Btbl
-
-let allocframe_real = Allocframe
-
-let freeframe_real = Freeframe
-
-let builtin_real = Builtin
-
-let cvtx2w_real = Cvtx2w
-
let is_XZR = function IREG0_XZR -> true | _ -> false
let reg_of_pc = Reg Asm.PC
@@ -232,17 +63,17 @@ let get_arith_p_wlocs = function
| Pfmovimmd _ -> [ reg_of_ireg Asm.X16 ]
| _ -> []
-let arith_p_rec i rd =
+let arith_p_rec i i' rd =
{
- inst = arith_p_real i;
- write_locs = [ rd ] @ get_arith_p_wlocs i;
+ inst = i;
+ write_locs = [ rd ] @ get_arith_p_wlocs i';
read_locs = [];
is_control = false;
}
let arith_pp_rec i rd rs =
{
- inst = arith_pp_real i;
+ inst = i;
write_locs = [ rd ];
read_locs = [ rs ];
is_control = false;
@@ -250,7 +81,7 @@ let arith_pp_rec i rd rs =
let arith_ppp_rec i rd r1 r2 =
{
- inst = arith_ppp_real i;
+ inst = i;
write_locs = [ rd ];
read_locs = [ r1; r2 ];
is_control = false;
@@ -259,7 +90,7 @@ let arith_ppp_rec i rd r1 r2 =
let arith_rr0r_rec i rd r1 r2 =
let rlocs = if is_XZR r1 then [ r2 ] else [ r1; r2 ] in
{
- inst = arith_rr0r_real i;
+ inst = i;
write_locs = [ rd ];
read_locs = rlocs;
is_control = false;
@@ -268,7 +99,7 @@ let arith_rr0r_rec i rd r1 r2 =
let arith_rr0_rec i rd r1 =
let rlocs = if is_XZR r1 then [] else [ r1 ] in
{
- inst = arith_rr0_real i;
+ inst = i;
write_locs = [ rd ];
read_locs = rlocs;
is_control = false;
@@ -277,7 +108,7 @@ let arith_rr0_rec i rd r1 =
let arith_arrrr0_rec i rd r1 r2 r3 =
let rlocs = if is_XZR r3 then [ r1; r2 ] else [ r1; r2; r3 ] in
{
- inst = arith_arrrr0_real i;
+ inst = i;
write_locs = [ rd ];
read_locs = rlocs;
is_control = false;
@@ -285,7 +116,7 @@ let arith_arrrr0_rec i rd r1 r2 r3 =
let arith_comparison_pp_rec i r1 r2 =
{
- inst = arith_comparison_pp_real i;
+ inst = i;
write_locs = flags_wlocs;
read_locs = [ r1; r2 ];
is_control = false;
@@ -294,7 +125,7 @@ let arith_comparison_pp_rec i r1 r2 =
let arith_comparison_r0r_rec i r1 r2 =
let rlocs = if is_XZR r1 then [ r2 ] else [ r1; r2 ] in
{
- inst = arith_comparison_r0r_real i;
+ inst = i;
write_locs = flags_wlocs;
read_locs = rlocs;
is_control = false;
@@ -302,7 +133,7 @@ let arith_comparison_r0r_rec i r1 r2 =
let arith_comparison_p_rec i r1 =
{
- inst = arith_comparison_p_real i;
+ inst = i;
write_locs = flags_wlocs;
read_locs = [ r1 ];
is_control = false;
@@ -320,7 +151,7 @@ let get_eval_addressing_rlocs a =
let load_rec ld rd a =
{
- inst = load_rd_a_real ld;
+ inst = ld;
write_locs = [ rd ];
read_locs = [ Mem ] @ get_eval_addressing_rlocs a;
is_control = false;
@@ -328,39 +159,39 @@ let load_rec ld rd a =
let store_rec st r a =
{
- inst = store_rs_a_real st;
+ inst = st;
write_locs = [ Mem ];
read_locs = [ r; Mem ] @ get_eval_addressing_rlocs a;
is_control = false;
}
-let loadsymbol_rec rd id =
+let loadsymbol_rec i rd id =
{
- inst = loadsymbol_real;
+ inst = i;
write_locs = [ rd ];
read_locs = [ Mem ];
is_control = false;
}
-let cvtsw2x_rec rd r1 =
+let cvtsw2x_rec i rd r1 =
{
- inst = cvtsw2x_real;
+ inst = i;
write_locs = [ rd ];
read_locs = [ r1 ];
is_control = false;
}
-let cvtuw2x_rec rd r1 =
+let cvtuw2x_rec i rd r1 =
{
- inst = cvtuw2x_real;
+ inst = i;
write_locs = [ rd ];
read_locs = [ r1 ];
is_control = false;
}
-let cvtx2w_rec rd =
+let cvtx2w_rec i rd =
{
- inst = cvtx2w_real;
+ inst = i;
write_locs = [ rd ];
read_locs = [ rd ];
is_control = false;
@@ -381,50 +212,50 @@ let get_testcond_rlocs c =
| Asm.TCgt -> [ reg_of_cr Asm.CN; reg_of_cr Asm.CZ; reg_of_cr Asm.CV ]
| Asm.TCle -> [ reg_of_cr Asm.CN; reg_of_cr Asm.CZ; reg_of_cr Asm.CV ]
-let cset_rec rd c =
+let cset_rec i rd c =
{
- inst = cset_real;
+ inst = i;
write_locs = [ rd ];
read_locs = get_testcond_rlocs c;
is_control = false;
}
-let csel_rec rd r1 r2 c =
+let csel_rec i rd r1 r2 c =
{
- inst = csel_real;
+ inst = i;
write_locs = [ rd ];
read_locs = [ r1; r2 ] @ get_testcond_rlocs c;
is_control = false;
}
-let fmovi_rec fsz rd r1 =
+let fmovi_rec i fsz rd r1 =
let rlocs = if is_XZR r1 then [] else [ r1 ] in
{
- inst = fmovi_real;
+ inst = i;
write_locs = [ rd ];
read_locs = rlocs;
is_control = false;
}
-let fnmul_rec fsz rd r1 r2 =
+let fnmul_rec i fsz rd r1 r2 =
{
- inst = fnmul_real;
+ inst = i;
write_locs = [ rd ];
read_locs = [ r1; r2 ];
is_control = false;
}
-let allocframe_rec sz linkofs =
+let allocframe_rec i sz linkofs =
{
- inst = allocframe_real;
+ inst = i;
write_locs = [ Mem; regXSP; reg_of_ireg Asm.X16; reg_of_ireg Asm.X29 ];
read_locs = [ regXSP; Mem ];
is_control = false;
}
-let freeframe_rec sz linkofs =
+let freeframe_rec i sz linkofs =
{
- inst = freeframe_real;
+ inst = i;
write_locs = [ Mem; regXSP; reg_of_ireg Asm.X16 ];
read_locs = [ regXSP; Mem ];
is_control = false;
@@ -432,44 +263,44 @@ let freeframe_rec sz linkofs =
let arith_rec i =
match i with
- | PArithP (i', rd) -> arith_p_rec i' (reg_of_dreg rd)
- | PArithPP (i', rd, rs) -> arith_pp_rec i' (reg_of_dreg rd) (reg_of_dreg rs)
+ | PArithP (i', rd) -> arith_p_rec (PBasic (PArith i)) i' (reg_of_dreg rd)
+ | PArithPP (i', rd, rs) -> arith_pp_rec (PBasic (PArith i)) (reg_of_dreg rd) (reg_of_dreg rs)
| PArithPPP (i', rd, r1, r2) ->
- arith_ppp_rec i' (reg_of_dreg rd) (reg_of_dreg r1) (reg_of_dreg r2)
+ arith_ppp_rec (PBasic (PArith i)) (reg_of_dreg rd) (reg_of_dreg r1) (reg_of_dreg r2)
| PArithRR0R (i', rd, r1, r2) ->
- arith_rr0r_rec i' (reg_of_ireg rd) (reg_of_ireg0 r1) (reg_of_ireg r2)
+ arith_rr0r_rec (PBasic (PArith i)) (reg_of_ireg rd) (reg_of_ireg0 r1) (reg_of_ireg r2)
| PArithRR0 (i', rd, r1) ->
- arith_rr0_rec i' (reg_of_ireg rd) (reg_of_ireg0 r1)
+ arith_rr0_rec (PBasic (PArith i)) (reg_of_ireg rd) (reg_of_ireg0 r1)
| PArithARRRR0 (i', rd, r1, r2, r3) ->
- arith_arrrr0_rec i' (reg_of_ireg rd) (reg_of_ireg r1) (reg_of_ireg r2)
+ arith_arrrr0_rec (PBasic (PArith i)) (reg_of_ireg rd) (reg_of_ireg r1) (reg_of_ireg r2)
(reg_of_ireg0 r3)
| PArithComparisonPP (i', r1, r2) ->
- arith_comparison_pp_rec i' (reg_of_dreg r1) (reg_of_dreg r2)
+ arith_comparison_pp_rec (PBasic (PArith i)) (reg_of_dreg r1) (reg_of_dreg r2)
| PArithComparisonR0R (i', r1, r2) ->
- arith_comparison_r0r_rec i' (reg_of_ireg0 r1) (reg_of_ireg r2)
- | PArithComparisonP (i', r1) -> arith_comparison_p_rec i' (reg_of_dreg r1)
- | Pcset (rd, c) -> cset_rec (reg_of_ireg rd) c
- | Pfmovi (fsz, rd, r1) -> fmovi_rec fsz (reg_of_freg rd) (reg_of_ireg0 r1)
+ arith_comparison_r0r_rec (PBasic (PArith i)) (reg_of_ireg0 r1) (reg_of_ireg r2)
+ | PArithComparisonP (i', r1) -> arith_comparison_p_rec (PBasic (PArith i)) (reg_of_dreg r1)
+ | Pcset (rd, c) -> cset_rec (PBasic (PArith i)) (reg_of_ireg rd) c
+ | Pfmovi (fsz, rd, r1) -> fmovi_rec (PBasic (PArith i)) fsz (reg_of_freg rd) (reg_of_ireg0 r1)
| Pcsel (rd, r1, r2, c) ->
- csel_rec (reg_of_dreg rd) (reg_of_dreg r1) (reg_of_dreg r2) c
+ csel_rec (PBasic (PArith i)) (reg_of_dreg rd) (reg_of_dreg r1) (reg_of_dreg r2) c
| Pfnmul (fsz, rd, r1, r2) ->
- fnmul_rec fsz (reg_of_freg rd) (reg_of_freg r1) (reg_of_freg r2)
+ fnmul_rec (PBasic (PArith i)) fsz (reg_of_freg rd) (reg_of_freg r1) (reg_of_freg r2)
let basic_rec i =
match i with
| PArith i' -> arith_rec i'
- | PLoad (ld, rd, a) -> load_rec ld (reg_of_dreg rd) a
- | PStore (st, r, a) -> store_rec st (reg_of_dreg r) a
- | Pallocframe (sz, linkofs) -> allocframe_rec sz linkofs
- | Pfreeframe (sz, linkofs) -> freeframe_rec sz linkofs
- | Ploadsymbol (rd, id) -> loadsymbol_rec (reg_of_ireg rd) id
- | Pcvtsw2x (rd, r1) -> cvtsw2x_rec (reg_of_ireg rd) (reg_of_ireg r1)
- | Pcvtuw2x (rd, r1) -> cvtuw2x_rec (reg_of_ireg rd) (reg_of_ireg r1)
- | Pcvtx2w rd -> cvtx2w_rec (reg_of_ireg rd)
-
-let builtin_rec ef args res =
+ | PLoad (ld, rd, a) -> load_rec (PBasic i) (reg_of_dreg rd) a
+ | PStore (st, r, a) -> store_rec (PBasic i) (reg_of_dreg r) a
+ | Pallocframe (sz, linkofs) -> allocframe_rec (PBasic i) sz linkofs
+ | Pfreeframe (sz, linkofs) -> freeframe_rec (PBasic i) sz linkofs
+ | Ploadsymbol (rd, id) -> loadsymbol_rec (PBasic i) (reg_of_ireg rd) id
+ | Pcvtsw2x (rd, r1) -> cvtsw2x_rec (PBasic i) (reg_of_ireg rd) (reg_of_ireg r1)
+ | Pcvtuw2x (rd, r1) -> cvtuw2x_rec (PBasic i) (reg_of_ireg rd) (reg_of_ireg r1)
+ | Pcvtx2w rd -> cvtx2w_rec (PBasic i) (reg_of_ireg rd)
+
+let builtin_rec i ef args res =
{
- inst = builtin_real;
+ inst = i;
write_locs = [ Mem ];
read_locs = [ Mem ];
is_control = true;
@@ -479,84 +310,84 @@ let ctl_flow_rec i =
match i with
| Pb lbl ->
{
- inst = b_real;
+ inst = (PControl (PCtlFlow i));
write_locs = [ reg_of_pc ];
read_locs = [ reg_of_pc ];
is_control = true;
}
| Pbc (c, lbl) ->
{
- inst = bc_real;
+ inst = (PControl (PCtlFlow i));
write_locs = [ reg_of_pc ];
read_locs = [ reg_of_pc ];
is_control = true;
}
| Pbl (id, sg) ->
{
- inst = bl_real;
+ inst = (PControl (PCtlFlow i));
write_locs = [ reg_of_ireg Asm.X30; reg_of_pc ];
read_locs = [ reg_of_pc ];
is_control = true;
}
| Pbs (id, sg) ->
{
- inst = bs_real;
+ inst = (PControl (PCtlFlow i));
write_locs = [ reg_of_pc ];
read_locs = [];
is_control = true;
}
| Pblr (r, sg) ->
{
- inst = blr_real;
+ inst = (PControl (PCtlFlow i));
write_locs = [ reg_of_ireg Asm.X30; reg_of_pc ];
read_locs = [ reg_of_ireg r ];
is_control = true;
}
| Pbr (r, sg) ->
{
- inst = br_real;
+ inst = (PControl (PCtlFlow i));
write_locs = [ reg_of_pc ];
read_locs = [ reg_of_ireg r ];
is_control = true;
}
| Pret r ->
{
- inst = ret_real;
+ inst = (PControl (PCtlFlow i));
write_locs = [ reg_of_pc ];
read_locs = [ reg_of_ireg r ];
is_control = true;
}
| Pcbnz (sz, r, lbl) ->
{
- inst = cbnz_real;
+ inst = (PControl (PCtlFlow i));
write_locs = [ reg_of_pc ];
read_locs = [ reg_of_ireg r; reg_of_pc ];
is_control = true;
}
| Pcbz (sz, r, lbl) ->
{
- inst = cbz_real;
+ inst = (PControl (PCtlFlow i));
write_locs = [ reg_of_pc ];
read_locs = [ reg_of_ireg r; reg_of_pc ];
is_control = true;
}
| Ptbnz (sz, r, n, lbl) ->
{
- inst = tbnz_real;
+ inst = (PControl (PCtlFlow i));
write_locs = [ reg_of_pc ];
read_locs = [ reg_of_ireg r; reg_of_pc ];
is_control = true;
}
| Ptbz (sz, r, n, lbl) ->
{
- inst = tbz_real;
+ inst = (PControl (PCtlFlow i));
write_locs = [ reg_of_pc ];
read_locs = [ reg_of_ireg r; reg_of_pc ];
is_control = true;
}
| Pbtbl (r1, tbl) ->
{
- inst = btbl_real;
+ inst = (PControl (PCtlFlow i));
write_locs = [ reg_of_ireg Asm.X16; reg_of_ireg Asm.X17; reg_of_pc ];
read_locs = [ reg_of_ireg r1; reg_of_pc ];
is_control = true;
@@ -564,7 +395,7 @@ let ctl_flow_rec i =
let control_rec i =
match i with
- | Pbuiltin (ef, args, res) -> builtin_rec ef args res
+ | Pbuiltin (ef, args, res) -> builtin_rec (PControl i) ef args res
| PCtlFlow i' -> ctl_flow_rec i'
let rec basic_recs body =