aboutsummaryrefslogtreecommitdiffstats
path: root/arm/Asmexpand.ml
diff options
context:
space:
mode:
authorXavier Leroy <xavier.leroy@inria.fr>2015-12-22 11:06:35 +0100
committerXavier Leroy <xavier.leroy@inria.fr>2015-12-22 11:06:35 +0100
commitf531d386db7051761bd31f2740a893ff97ce65aa (patch)
tree0e0d535d0e36927500441de21ac727dc1677ac4b /arm/Asmexpand.ml
parent12b5eaf144285de569be7123913ee78f17dd9b03 (diff)
downloadcompcert-kvx-f531d386db7051761bd31f2740a893ff97ce65aa.tar.gz
compcert-kvx-f531d386db7051761bd31f2740a893ff97ce65aa.zip
Add CLZ builtins for ARM and IA32
ARM: add __builtin_clzl, __builtin_clzll IA32: add __builtin_clzl, __builtin_clzll, __builtin_ctzl, __builtin_ctzll Add corresponding tests in tests/regression/
Diffstat (limited to 'arm/Asmexpand.ml')
-rw-r--r--arm/Asmexpand.ml8
1 files changed, 7 insertions, 1 deletions
diff --git a/arm/Asmexpand.ml b/arm/Asmexpand.ml
index 2b19cbe8..65bb19ee 100644
--- a/arm/Asmexpand.ml
+++ b/arm/Asmexpand.ml
@@ -287,8 +287,14 @@ let expand_builtin_inline name args res =
emit (Prev (res, a1))
| "__builtin_bswap16", [BA(IR a1)], BR(IR res) ->
emit (Prev16 (res, a1))
- | "__builtin_clz", [BA(IR a1)], BR(IR res) ->
+ | ("__builtin_clz" | "__builtin_clzl"), [BA(IR a1)], BR(IR res) ->
emit (Pclz (res, a1))
+ | "__builtin_clzll", [BA_splitlong(BA (IR ah), BA (IR al))], BR(IR res) ->
+ emit (Pclz (IR14, al));
+ emit (Pcmp (ah, SOimm _0));
+ emit (Pmovite (TCeq, IR14, SOimm _0, SOreg IR14));
+ emit (Pclz (res, ah));
+ emit (Padd (res, res, SOreg IR14))
(* Float arithmetic *)
| "__builtin_fabs", [BA(FR a1)], BR(FR res) ->
emit (Pfabsd (res,a1))