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| author | Xavier Leroy <xavier.leroy@college-de-france.fr> | 2019-05-31 11:55:57 +0200 |
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| committer | Xavier Leroy <xavier.leroy@college-de-france.fr> | 2019-05-31 12:00:37 +0200 |
| commit | 8b0724fdb1af4f89a603f7bde4b5b625c870e111 (patch) | |
| tree | 728c79a8ed3f2d99a24d181f712665f3a80fbd23 /backend/Allocation.v | |
| parent | e10555313645cf3c35f244f42afa5a03fba2bac1 (diff) | |
| download | compcert-kvx-8b0724fdb1af4f89a603f7bde4b5b625c870e111.tar.gz compcert-kvx-8b0724fdb1af4f89a603f7bde4b5b625c870e111.zip | |
Fix misspellings in messages, man pages, and comments
This is a manual, partial merge of Github pull request #296 by @Fourchaux.
flocq/, cparser/MenhirLib/ and parts of test/ have not been changed
because these are local copies and the fixes should be performed upstream.
Diffstat (limited to 'backend/Allocation.v')
| -rw-r--r-- | backend/Allocation.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/backend/Allocation.v b/backend/Allocation.v index cf62295d..13e14530 100644 --- a/backend/Allocation.v +++ b/backend/Allocation.v @@ -36,7 +36,7 @@ Require Import Op Registers RTL Locations Conventions RTLtyping LTL. - a [Lbranch s] instruction. The [block_shape] type below describes all possible cases of structural - maching between an RTL instruction and an LTL basic block. + matching between an RTL instruction and an LTL basic block. *) Inductive move: Type := |