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authorxleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>2012-01-15 08:57:09 +0000
committerxleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e>2012-01-15 08:57:09 +0000
commitc4877832826fa26aea9c236f16bdc2de16c98150 (patch)
treed25f713d4c6f4cf6126ad0451b80b32138eac84a /backend/Constprop.v
parenta82c9c0e4a0b8e37c9c3ea5ae99714982563606f (diff)
downloadcompcert-kvx-c4877832826fa26aea9c236f16bdc2de16c98150.tar.gz
compcert-kvx-c4877832826fa26aea9c236f16bdc2de16c98150.zip
Added volatile_read_global and volatile_store_global builtins.
Finished updating IA32 and ARM ports. git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@1792 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'backend/Constprop.v')
-rw-r--r--backend/Constprop.v3
1 files changed, 3 insertions, 0 deletions
diff --git a/backend/Constprop.v b/backend/Constprop.v
index 4c303ac4..c3b98634 100644
--- a/backend/Constprop.v
+++ b/backend/Constprop.v
@@ -199,6 +199,9 @@ Definition transf_instr (app: D.t) (instr: instruction) :=
Icall sig (transf_ros app ros) args res s
| Itailcall sig ros args =>
Itailcall sig (transf_ros app ros) args
+ | Ibuiltin ef args res s =>
+ let (ef', args') := builtin_strength_reduction ef args (approx_regs app args) in
+ Ibuiltin ef' args' res s
| Icond cond args s1 s2 =>
match eval_static_condition cond (approx_regs app args) with
| Some b =>