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author | xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2013-12-20 13:05:53 +0000 |
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committer | xleroy <xleroy@fca1b0fc-160b-0410-b1d3-a4f43f01ea2e> | 2013-12-20 13:05:53 +0000 |
commit | 7698300cfe2d3f944ce2e1d4a60a263620487718 (patch) | |
tree | 74292bb5f65bc797906b5c768df2e2e937e869b6 /backend/Regalloc.ml | |
parent | c511207bd0f25c4199770233175924a725526bd3 (diff) | |
download | compcert-kvx-7698300cfe2d3f944ce2e1d4a60a263620487718.tar.gz compcert-kvx-7698300cfe2d3f944ce2e1d4a60a263620487718.zip |
Merge of branch value-analysis.
git-svn-id: https://yquem.inria.fr/compcert/svn/compcert/trunk@2381 fca1b0fc-160b-0410-b1d3-a4f43f01ea2e
Diffstat (limited to 'backend/Regalloc.ml')
-rw-r--r-- | backend/Regalloc.ml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/backend/Regalloc.ml b/backend/Regalloc.ml index 8a3c05ea..5c68602c 100644 --- a/backend/Regalloc.ml +++ b/backend/Regalloc.ml @@ -278,7 +278,7 @@ end module Liveness_Solver = Backward_Dataflow_Solver(VSetLat)(NodeSetBackward) let liveness_analysis f = - match Liveness_Solver.fixpoint f.fn_code successors_block (transfer_live f) [] with + match Liveness_Solver.fixpoint f.fn_code successors_block (transfer_live f) with | None -> assert false | Some lv -> lv |